Commit 59baa83e authored by David Virag's avatar David Virag Committed by Krzysztof Kozlowski
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dt-bindings: clock: exynos7885: Add CMU_TOP PLL MUX indices 



Add indices for missing MUX clocks from PLLs in CMU_TOP.

Signed-off-by: default avatarDavid Virag <virag.david003@gmail.com>
Link: https://lore.kernel.org/r/20240806121157.479212-3-virag.david003@gmail.com


Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent abf3a3ea

include/dt-bindings/clock/exynos7885.h

+2 −0
Original line number Diff line number Diff line
@@ -69,6 +69,8 @@ 
#define CLK_GOUT_FSYS_MMC_EMBD		58

#define CLK_GOUT_FSYS_MMC_SDIO		59

#define CLK_GOUT_FSYS_USB30DRD		60

#define CLK_MOUT_SHARED0_PLL		61

#define CLK_MOUT_SHARED1_PLL		62



/* CMU_CORE */

#define CLK_MOUT_CORE_BUS_USER			1