Commit 59f38b64 authored by Jouni Högander's avatar Jouni Högander
Browse files

drm/i915/psr: Use PSR2_MAN_TRK_CTL CFF bit only to send full update 



We are preparing for a change where only frontbuffer flush will use
single full frame bit of a new register (SFF_CTL) available on LunarLake
onwards.

It shouldn't be necessary to have SFF bit set if CFF bit is set in
PSR2_MAN_TRK_CTL -> removing setting it on all platforms as there is not
reason to have it different on older platforms.

v2: commit message improved

Signed-off-by: default avatarJouni Högander <jouni.hogander@intel.com>
Reviewed-by: default avatarAnimesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250213064804.2077127-2-jouni.hogander@intel.com
parent ac6674bc

drivers/gpu/drm/i915/display/intel_psr.c

+0 −1
Original line number Diff line number Diff line
@@ -2395,7 +2395,6 @@ static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state, 
	val |= man_trk_ctl_partial_frame_bit_get(display);



	if (full_update) {

		val |= man_trk_ctl_single_full_frame_bit_get(display);

		val |= man_trk_ctl_continuos_full_frame(display);

		goto exit;

	}