Commit 5a1f6295 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Dmitry Baryshkov
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dt-bindings: display/msm: merge SM8250 DPU into SM8150 



Split of the bindings was artificial and not helping - we end up with
multiple binding files for very similar devices thus increasing the
chances of using different order of reg and clocks entries.

Unify DPU bindings of SM8150 and SM8250, because they are the same.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: default avatarRob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/617868/
Link: https://lore.kernel.org/r/20241003-dt-binding-display-msm-merge-v1-2-91ab08fc76a2@linaro.org


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent 897ee967

Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml

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@@ -13,7 +13,9 @@ $ref: /schemas/display/msm/dpu-common.yaml# 


properties:

  compatible:

    const: qcom,sm8150-dpu

    enum:

      - qcom,sm8150-dpu

      - qcom,sm8250-dpu



  reg:

    items:

Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/msm/qcom,sm8250-dpu.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm SM8250 Display DPU



maintainers:

  - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>



$ref: /schemas/display/msm/dpu-common.yaml#



properties:

  compatible:

    const: qcom,sm8250-dpu



  reg:

    items:

      - description: Address offset and size for mdp register set

      - description: Address offset and size for vbif register set



  reg-names:

    items:

      - const: mdp

      - const: vbif



  clocks:

    items:

      - description: Display ahb clock

      - description: Display hf axi clock

      - description: Display core clock

      - description: Display vsync clock



  clock-names:

    items:

      - const: iface

      - const: bus

      - const: core

      - const: vsync



required:

  - compatible

  - reg

  - reg-names

  - clocks

  - clock-names



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/qcom,dispcc-sm8250.h>

    #include <dt-bindings/clock/qcom,gcc-sm8250.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/interconnect/qcom,sm8250.h>

    #include <dt-bindings/power/qcom,rpmhpd.h>



    display-controller@ae01000 {

        compatible = "qcom,sm8250-dpu";

        reg = <0x0ae01000 0x8f000>,

              <0x0aeb0000 0x2008>;

        reg-names = "mdp", "vbif";



        clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,

                 <&gcc GCC_DISP_HF_AXI_CLK>,

                 <&dispcc DISP_CC_MDSS_MDP_CLK>,

                 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;

        clock-names = "iface", "bus", "core", "vsync";



        assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;

        assigned-clock-rates = <19200000>;



        operating-points-v2 = <&mdp_opp_table>;

        power-domains = <&rpmhpd RPMHPD_MMCX>;



        interrupt-parent = <&mdss>;

        interrupts = <0>;



        ports {

            #address-cells = <1>;

            #size-cells = <0>;



            port@0 {

                reg = <0>;

                endpoint {

                    remote-endpoint = <&dsi0_in>;

                };

            };



            port@1 {

                reg = <1>;

                endpoint {

                    remote-endpoint = <&dsi1_in>;

                };

            };

        };

    };

...