Commit 5a3d3e11 authored by Roman Li's avatar Roman Li Committed by Alex Deucher
Browse files

drm/amd/display: Add dmub hpd sense callback 



[WHY]
HPD sense notification has been implemented in DMUB, which
can occur during low power states and need to be
notified from firmware to driver.

[HOW]
Define callback and register new HPD sense notification.

Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: default avatarRoman Li <Roman.Li@amd.com>
Signed-off-by: default avatarAlex Hung <alex.hung@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d18a56b2

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+20 −0
Original line number Diff line number Diff line
@@ -807,6 +807,20 @@ static void dmub_hpd_callback(struct amdgpu_device *adev, 
	}

}



/**

 * dmub_hpd_sense_callback - DMUB HPD sense processing callback.

 * @adev: amdgpu_device pointer

 * @notify: dmub notification structure

 *

 * HPD sense changes can occur during low power states and need to be

 * notified from firmware to driver.

 */

static void dmub_hpd_sense_callback(struct amdgpu_device *adev,

			      struct dmub_notification *notify)

{

	DRM_DEBUG_DRIVER("DMUB HPD SENSE callback.\n");

}



/**

 * register_dmub_notify_callback - Sets callback for DMUB notify

 * @adev: amdgpu_device pointer
@@ -3808,6 +3822,12 @@ static int register_hpd_handlers(struct amdgpu_device *adev) 
			DRM_ERROR("amdgpu: fail to register dmub hpd callback");

			return -EINVAL;

		}



		if (!register_dmub_notify_callback(adev, DMUB_NOTIFICATION_HPD_SENSE_NOTIFY,

			dmub_hpd_sense_callback, true)) {

			DRM_ERROR("amdgpu: fail to register dmub hpd sense callback");

			return -EINVAL;

		}

	}



	list_for_each_entry(connector,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

+1 −1
Original line number Diff line number Diff line
@@ -50,7 +50,7 @@ 


#define AMDGPU_DM_MAX_NUM_EDP 2



#define AMDGPU_DMUB_NOTIFICATION_MAX 6

#define AMDGPU_DMUB_NOTIFICATION_MAX 7



#define HDMI_AMD_VENDOR_SPECIFIC_DATA_BLOCK_IEEE_REGISTRATION_ID 0x00001A

#define AMD_VSDB_VERSION_3_FEATURECAP_REPLAYMODE 0x40