Commit 5a4bd506 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux 

Pull clk fixes from Stephen Boyd:
 "A set of clk fixes for the Qualcomm, Mediatek, and Allwinner drivers:

   - Fix the Qualcomm Stromer Plus PLL set_rate() clk_op to explicitly
     set the alpha enable bit and not set bits that don't exist

   - Mark Qualcomm IPQ9574 crypto clks as voted to avoid stuck clk
     warnings

   - Fix the parent of some PLLs on Qualcomm sm6530 so their rate is
     correct

   - Fix the min/max rate clamping logic in the Allwinner driver that
     got broken in v6.9

   - Limit runtime PM enabling in the Mediatek driver to only
     mt8183-mfgcfg so that system wide resume doesn't break on other
     Mediatek SoCs"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: mediatek: mt8183: Only enable runtime PM on mt8183-mfgcfg
  clk: sunxi-ng: common: Don't call hw_to_ccu_common on hw without common
  clk: qcom: gcc-ipq9574: Add BRANCH_HALT_VOTED flag
  clk: qcom: apss-ipq-pll: remove 'config_ctl_hi_val' from Stromer pll configs
  clk: qcom: clk-alpha-pll: set ALPHA_EN bit for Stromer Plus PLLs
  clk: qcom: gcc-sm6350: Fix gpll6* & gpll7 parents
parents c6653f49 10f84de2

drivers/clk/mediatek/clk-mt8183-mfgcfg.c

+1 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ static const struct mtk_gate mfg_clks[] = { 
static const struct mtk_clk_desc mfg_desc = {

	.clks = mfg_clks,

	.num_clks = ARRAY_SIZE(mfg_clks),

	.need_runtime_pm = true,

};



static const struct of_device_id of_match_clk_mt8183_mfg[] = {

drivers/clk/mediatek/clk-mtk.c

+14 −10
Original line number Diff line number Diff line
@@ -496,6 +496,7 @@ static int __mtk_clk_simple_probe(struct platform_device *pdev, 
	}





	if (mcd->need_runtime_pm) {

		devm_pm_runtime_enable(&pdev->dev);

		/*

		 * Do a pm_runtime_resume_and_get() to workaround a possible
@@ -504,6 +505,7 @@ static int __mtk_clk_simple_probe(struct platform_device *pdev, 
		r = pm_runtime_resume_and_get(&pdev->dev);

		if (r)

			return r;

	}



	/* Calculate how many clk_hw_onecell_data entries to allocate */

	num_clks = mcd->num_clks + mcd->num_composite_clks;
@@ -585,6 +587,7 @@ static int __mtk_clk_simple_probe(struct platform_device *pdev, 
			goto unregister_clks;

	}



	if (mcd->need_runtime_pm)

		pm_runtime_put(&pdev->dev);



	return r;
@@ -618,6 +621,7 @@ static int __mtk_clk_simple_probe(struct platform_device *pdev, 
	if (mcd->shared_io && base)

		iounmap(base);



	if (mcd->need_runtime_pm)

		pm_runtime_put(&pdev->dev);

	return r;

}

drivers/clk/mediatek/clk-mtk.h

+2 −0
Original line number Diff line number Diff line
@@ -237,6 +237,8 @@ struct mtk_clk_desc { 


	int (*clk_notifier_func)(struct device *dev, struct clk *clk);

	unsigned int mfg_clk_idx;



	bool need_runtime_pm;

};



int mtk_clk_pdev_probe(struct platform_device *pdev);

drivers/clk/qcom/apss-ipq-pll.c

+0 −2
Original line number Diff line number Diff line
@@ -70,7 +70,6 @@ static struct clk_alpha_pll ipq_pll_stromer_plus = { 
static const struct alpha_pll_config ipq5018_pll_config = {

	.l = 0x2a,

	.config_ctl_val = 0x4001075b,

	.config_ctl_hi_val = 0x304,

	.main_output_mask = BIT(0),

	.aux_output_mask = BIT(1),

	.early_output_mask = BIT(3),
@@ -84,7 +83,6 @@ static const struct alpha_pll_config ipq5018_pll_config = { 
static const struct alpha_pll_config ipq5332_pll_config = {

	.l = 0x2d,

	.config_ctl_val = 0x4001075b,

	.config_ctl_hi_val = 0x304,

	.main_output_mask = BIT(0),

	.aux_output_mask = BIT(1),

	.early_output_mask = BIT(3),

drivers/clk/qcom/clk-alpha-pll.c

+3 −0
Original line number Diff line number Diff line
@@ -2574,6 +2574,9 @@ static int clk_alpha_pll_stromer_plus_set_rate(struct clk_hw *hw, 
	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),

					a >> ALPHA_BITWIDTH);



	regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),

			   PLL_ALPHA_EN, PLL_ALPHA_EN);



	regmap_write(pll->clkr.regmap, PLL_MODE(pll), PLL_BYPASSNL);



	/* Wait five micro seconds or more */