Unverified Commit 5a60d634 authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno
Browse files

arm64: dts: mediatek: mt8183: Move thermal-zones to the root node

The thermal zones are not a soc bus device: move it to the root
node to solve simple_bus_reg warnings.

Cc: stable@vger.kernel.org
Fixes: b325ce39 ("arm64: dts: mt8183: add thermal zone node")
Link: https://lore.kernel.org/r/20231025093816.44327-9-angelogioacchino.delregno@collabora.com


Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
parent 24165c5d
Loading
Loading
Loading
Loading
+121 −121
Original line number Diff line number Diff line
@@ -1210,127 +1210,6 @@ thermal: thermal@1100b000 {
			nvmem-cell-names = "calibration-data";
		};

		thermal_zones: thermal-zones {
			cpu_thermal: cpu-thermal {
				polling-delay-passive = <100>;
				polling-delay = <500>;
				thermal-sensors = <&thermal 0>;
				sustainable-power = <5000>;

				trips {
					threshold: trip-point0 {
						temperature = <68000>;
						hysteresis = <2000>;
						type = "passive";
					};

					target: trip-point1 {
						temperature = <80000>;
						hysteresis = <2000>;
						type = "passive";
					};

					cpu_crit: cpu-crit {
						temperature = <115000>;
						hysteresis = <2000>;
						type = "critical";
					};
				};

				cooling-maps {
					map0 {
						trip = <&target>;
						cooling-device = <&cpu0
							THERMAL_NO_LIMIT
							THERMAL_NO_LIMIT>,
								 <&cpu1
							THERMAL_NO_LIMIT
							THERMAL_NO_LIMIT>,
								 <&cpu2
							THERMAL_NO_LIMIT
							THERMAL_NO_LIMIT>,
								 <&cpu3
							THERMAL_NO_LIMIT
							THERMAL_NO_LIMIT>;
						contribution = <3072>;
					};
					map1 {
						trip = <&target>;
						cooling-device = <&cpu4
							THERMAL_NO_LIMIT
							THERMAL_NO_LIMIT>,
								 <&cpu5
							THERMAL_NO_LIMIT
							THERMAL_NO_LIMIT>,
								 <&cpu6
							THERMAL_NO_LIMIT
							THERMAL_NO_LIMIT>,
								 <&cpu7
							THERMAL_NO_LIMIT
							THERMAL_NO_LIMIT>;
						contribution = <1024>;
					};
				};
			};

			/* The tzts1 ~ tzts6 don't need to polling */
			/* The tzts1 ~ tzts6 don't need to thermal throttle */

			tzts1: tzts1 {
				polling-delay-passive = <0>;
				polling-delay = <0>;
				thermal-sensors = <&thermal 1>;
				sustainable-power = <5000>;
				trips {};
				cooling-maps {};
			};

			tzts2: tzts2 {
				polling-delay-passive = <0>;
				polling-delay = <0>;
				thermal-sensors = <&thermal 2>;
				sustainable-power = <5000>;
				trips {};
				cooling-maps {};
			};

			tzts3: tzts3 {
				polling-delay-passive = <0>;
				polling-delay = <0>;
				thermal-sensors = <&thermal 3>;
				sustainable-power = <5000>;
				trips {};
				cooling-maps {};
			};

			tzts4: tzts4 {
				polling-delay-passive = <0>;
				polling-delay = <0>;
				thermal-sensors = <&thermal 4>;
				sustainable-power = <5000>;
				trips {};
				cooling-maps {};
			};

			tzts5: tzts5 {
				polling-delay-passive = <0>;
				polling-delay = <0>;
				thermal-sensors = <&thermal 5>;
				sustainable-power = <5000>;
				trips {};
				cooling-maps {};
			};

			tztsABB: tztsABB {
				polling-delay-passive = <0>;
				polling-delay = <0>;
				thermal-sensors = <&thermal 6>;
				sustainable-power = <5000>;
				trips {};
				cooling-maps {};
			};
		};

		pwm0: pwm@1100e000 {
			compatible = "mediatek,mt8183-disp-pwm";
			reg = <0 0x1100e000 0 0x1000>;
@@ -2105,4 +1984,125 @@ larb3: larb@1a002000 {
			power-domains = <&spm MT8183_POWER_DOMAIN_CAM>;
		};
	};

	thermal_zones: thermal-zones {
		cpu_thermal: cpu-thermal {
			polling-delay-passive = <100>;
			polling-delay = <500>;
			thermal-sensors = <&thermal 0>;
			sustainable-power = <5000>;

			trips {
				threshold: trip-point0 {
					temperature = <68000>;
					hysteresis = <2000>;
					type = "passive";
				};

				target: trip-point1 {
					temperature = <80000>;
					hysteresis = <2000>;
					type = "passive";
				};

				cpu_crit: cpu-crit {
					temperature = <115000>;
					hysteresis = <2000>;
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&target>;
					cooling-device = <&cpu0
						THERMAL_NO_LIMIT
						THERMAL_NO_LIMIT>,
							 <&cpu1
						THERMAL_NO_LIMIT
						THERMAL_NO_LIMIT>,
							 <&cpu2
						THERMAL_NO_LIMIT
						THERMAL_NO_LIMIT>,
							 <&cpu3
						THERMAL_NO_LIMIT
						THERMAL_NO_LIMIT>;
					contribution = <3072>;
				};
				map1 {
					trip = <&target>;
					cooling-device = <&cpu4
						THERMAL_NO_LIMIT
						THERMAL_NO_LIMIT>,
							 <&cpu5
						THERMAL_NO_LIMIT
						THERMAL_NO_LIMIT>,
							 <&cpu6
						THERMAL_NO_LIMIT
						THERMAL_NO_LIMIT>,
							 <&cpu7
						THERMAL_NO_LIMIT
						THERMAL_NO_LIMIT>;
					contribution = <1024>;
				};
			};
		};

		/* The tzts1 ~ tzts6 don't need to polling */
		/* The tzts1 ~ tzts6 don't need to thermal throttle */

		tzts1: tzts1 {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&thermal 1>;
			sustainable-power = <5000>;
			trips {};
			cooling-maps {};
		};

		tzts2: tzts2 {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&thermal 2>;
			sustainable-power = <5000>;
			trips {};
			cooling-maps {};
		};

		tzts3: tzts3 {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&thermal 3>;
			sustainable-power = <5000>;
			trips {};
			cooling-maps {};
		};

		tzts4: tzts4 {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&thermal 4>;
			sustainable-power = <5000>;
			trips {};
			cooling-maps {};
		};

		tzts5: tzts5 {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&thermal 5>;
			sustainable-power = <5000>;
			trips {};
			cooling-maps {};
		};

		tztsABB: tztsABB {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&thermal 6>;
			sustainable-power = <5000>;
			trips {};
			cooling-maps {};
		};
	};
};