Commit 5a691956 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull ata updates from Niklas Cassel:

 - Misc code cleanups related to tag checking and tag command completion
   (Damien)

 - Remove Baikal bt1-ahci DT binding since the upstreaming for this SoC
   is not going to be finalized (Andy)

 - Only call the libata port error handler from the SCSI error handler
   if there were command timeouts or if EH was scheduled for the port
   (Damien)

 - Refactor ata_scsiop_maint_in() to more clearly show that there is
   only one service action implemented for the MAINTENANCE IN command
   (me)

 - Clean up the handling of sysfs attributes exposed by libata (Heiner)

 - Let libahci_platform use a flexible array member for platform PHYs to
   avoid multiple allocations (Rosen)

 - Do not retry reset if the device has been removed/hot-unplugged
   (Igor)

 - Add missing newlines to error prints in pata_arasan_cf driver (Haoyu)

 - Use the correct SCSI host byte when completing deferred ATA
   PASS-THROUGH commands, to avoid the SCSI mid-layer from failing the
   commands instead of requeuing (Igor)

* tag 'ata-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/libata/linux:
  ata: libata-scsi: fix requeue of deferred ATA PASS-THROUGH commands
  ata: pata_arasan_cf: fix missing newline in dev_err() messages
  ata: libata-transport: remove static variable ata_scsi_transport_template
  ata: libata-transport: split struct ata_internal
  ata: libata-transport: use static struct ata_transport_internal to simplify match functions
  ata: libata-transport: inline ata_attach|release_transport
  ata: libata-transport: instantiate struct ata_internal statically
  ata: libata-eh: Do not retry reset if the device is gone
  ata: libahci_platform: use flex array for platform PHYs
  ata: libata-transport: remove redundant dynamic sysfs attributes
  ata: libata-scsi: refactor ata_scsiop_maint_in()
  ata: libata-eh: avoid unnecessary calls to ata_scsi_port_error_handler()
  ata: ahci-dwc: Remove not-going-to-be-supported code for Baikal SoC
  ata: libata-scsi: rename and improve ata_qc_done()
  ata: libata-scsi: make ata_scsi_simulate() static
  ata: libata-scsi: simplify ata_scsi_requeue_deferred_qc()
  ata: libata-sata: simplify ata_sas_queuecmd()
  ata: libata-core: improve tag checks in ata_qc_issue()
parents 40286d63 8ebf408e
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/ata/baikal,bt1-ahci.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Baikal-T1 SoC AHCI SATA controller

maintainers:
  - Serge Semin <fancer.lancer@gmail.com>

description:
  AHCI SATA controller embedded into the Baikal-T1 SoC is based on the
  DWC AHCI SATA v4.10a IP-core.

allOf:
  - $ref: snps,dwc-ahci-common.yaml#

properties:
  compatible:
    const: baikal,bt1-ahci

  clocks:
    items:
      - description: Peripheral APB bus clock
      - description: Application AXI BIU clock
      - description: SATA Ports reference clock

  clock-names:
    items:
      - const: pclk
      - const: aclk
      - const: ref

  resets:
    items:
      - description: Application AXI BIU domain reset
      - description: SATA Ports clock domain reset

  reset-names:
    items:
      - const: arst
      - const: ref

  ports-implemented:
    maximum: 0x3

patternProperties:
  "^sata-port@[0-1]$":
    $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port

    properties:
      reg:
        minimum: 0
        maximum: 1

      snps,tx-ts-max:
        $ref: /schemas/types.yaml#/definitions/uint32
        description:
          Due to having AXI3 bus interface utilized the maximum Tx DMA
          transaction size can't exceed 16 beats (AxLEN[3:0]).
        enum: [ 1, 2, 4, 8, 16 ]

      snps,rx-ts-max:
        $ref: /schemas/types.yaml#/definitions/uint32
        description:
          Due to having AXI3 bus interface utilized the maximum Rx DMA
          transaction size can't exceed 16 beats (AxLEN[3:0]).
        enum: [ 1, 2, 4, 8, 16 ]

    unevaluatedProperties: false

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - resets

unevaluatedProperties: false

examples:
  - |
    sata@1f050000 {
      compatible = "baikal,bt1-ahci";
      reg = <0x1f050000 0x2000>;
      #address-cells = <1>;
      #size-cells = <0>;

      interrupts = <0 64 4>;

      clocks = <&ccu_sys 1>, <&ccu_axi 2>, <&sata_ref_clk>;
      clock-names = "pclk", "aclk", "ref";

      resets = <&ccu_axi 2>, <&ccu_sys 0>;
      reset-names = "arst", "ref";

      ports-implemented = <0x3>;

      sata-port@0 {
        reg = <0>;

        snps,tx-ts-max = <4>;
        snps,rx-ts-max = <4>;
      };

      sata-port@1 {
        reg = <1>;

        snps,tx-ts-max = <4>;
        snps,rx-ts-max = <4>;
      };
    };
...
+0 −1
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@@ -194,7 +194,6 @@ config AHCI_DM816
config AHCI_DWC
	tristate "Synopsys DWC AHCI SATA support"
	select SATA_HOST
	select MFD_SYSCON if (MIPS_BAIKAL_T1 || COMPILE_TEST)
	help
	  This option enables support for the Synopsys DWC AHCI SATA
	  controller implementation.
+2 −1
Original line number Diff line number Diff line
@@ -357,7 +357,6 @@ struct ahci_host_priv {
	 * If platform uses PHYs. There is a 1:1 relation between the port number and
	 * the PHY position in this array.
	 */
	struct phy		**phys;
	unsigned		nports;		/* Number of ports */
	void			*plat_data;	/* Other platform data */
	unsigned int		irq;		/* interrupt line */
@@ -379,6 +378,8 @@ struct ahci_host_priv {
	/* only required for per-port MSI(-X) support */
	int			(*get_irq_vector)(struct ata_host *host,
						  int port);

	struct phy		*phys[] __counted_by(nports);
};

/*
+0 −55
Original line number Diff line number Diff line
@@ -13,12 +13,10 @@
#include <linux/kernel.h>
#include <linux/libata.h>
#include <linux/log2.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/regmap.h>

#include "ahci.h"

@@ -92,20 +90,6 @@
#define AHCI_DWC_PORT_PHYCR		0x74
#define AHCI_DWC_PORT_PHYSR		0x78

/* Baikal-T1 AHCI SATA specific registers */
#define AHCI_BT1_HOST_PHYCR		AHCI_DWC_HOST_GPCR
#define AHCI_BT1_HOST_MPLM_MASK		GENMASK(29, 23)
#define AHCI_BT1_HOST_LOSDT_MASK	GENMASK(22, 20)
#define AHCI_BT1_HOST_CRR		BIT(19)
#define AHCI_BT1_HOST_CRW		BIT(18)
#define AHCI_BT1_HOST_CRCD		BIT(17)
#define AHCI_BT1_HOST_CRCA		BIT(16)
#define AHCI_BT1_HOST_CRDI_MASK		GENMASK(15, 0)

#define AHCI_BT1_HOST_PHYSR		AHCI_DWC_HOST_GPSR
#define AHCI_BT1_HOST_CRA		BIT(16)
#define AHCI_BT1_HOST_CRDO_MASK		GENMASK(15, 0)

struct ahci_dwc_plat_data {
	unsigned int pflags;
	unsigned int hflags;
@@ -122,39 +106,6 @@ struct ahci_dwc_host_priv {
	u32 dmacr[AHCI_MAX_PORTS];
};

static int ahci_bt1_init(struct ahci_host_priv *hpriv)
{
	struct ahci_dwc_host_priv *dpriv = hpriv->plat_data;
	int ret;

	/* APB, application and reference clocks are required */
	if (!ahci_platform_find_clk(hpriv, "pclk") ||
	    !ahci_platform_find_clk(hpriv, "aclk") ||
	    !ahci_platform_find_clk(hpriv, "ref")) {
		dev_err(&dpriv->pdev->dev, "No system clocks specified\n");
		return -EINVAL;
	}

	/*
	 * Fully reset the SATA AXI and ref clocks domain to ensure the state
	 * machine is working from scratch especially if the reference clocks
	 * source has been changed.
	 */
	ret = ahci_platform_assert_rsts(hpriv);
	if (ret) {
		dev_err(&dpriv->pdev->dev, "Couldn't assert the resets\n");
		return ret;
	}

	ret = ahci_platform_deassert_rsts(hpriv);
	if (ret) {
		dev_err(&dpriv->pdev->dev, "Couldn't de-assert the resets\n");
		return ret;
	}

	return 0;
}

static struct ahci_host_priv *ahci_dwc_get_resources(struct platform_device *pdev)
{
	struct ahci_dwc_host_priv *dpriv;
@@ -457,15 +408,9 @@ static struct ahci_dwc_plat_data ahci_dwc_plat = {
	.pflags = AHCI_PLATFORM_GET_RESETS,
};

static struct ahci_dwc_plat_data ahci_bt1_plat = {
	.pflags = AHCI_PLATFORM_GET_RESETS | AHCI_PLATFORM_RST_TRIGGER,
	.init = ahci_bt1_init,
};

static const struct of_device_id ahci_dwc_of_match[] = {
	{ .compatible = "snps,dwc-ahci", &ahci_dwc_plat },
	{ .compatible = "snps,spear-ahci", &ahci_dwc_plat },
	{ .compatible = "baikal,bt1-ahci", &ahci_bt1_plat },
	{},
};
MODULE_DEVICE_TABLE(of, ahci_dwc_of_match);
+15 −18
Original line number Diff line number Diff line
@@ -482,15 +482,29 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev,
	struct ahci_host_priv *hpriv;
	u32 mask_port_map = 0;
	u32 max_port;
	int nports;

	if (!devres_open_group(dev, NULL, GFP_KERNEL))
		return ERR_PTR(-ENOMEM);

	hpriv = devres_alloc(ahci_platform_put_resources, sizeof(*hpriv),
	/* find maximum port id for allocating structures */
	max_port = ahci_platform_find_max_port_id(dev);
	/*
	 * Set nports according to maximum port id. Clamp at
	 * AHCI_MAX_PORTS, warning message for invalid port id
	 * is generated later.
	 * When DT has no sub-nodes max_port is 0, nports is 1,
	 * in order to be able to use the
	 * ahci_platform_[en|dis]able_[phys|regulators] functions.
	 */
	nports = min(AHCI_MAX_PORTS, max_port + 1);
	hpriv = devres_alloc(ahci_platform_put_resources, struct_size(hpriv, phys, nports),
			     GFP_KERNEL);
	if (!hpriv)
		goto err_out;

	hpriv->nports = nports;

	devres_add(dev, hpriv);

	/*
@@ -573,23 +587,6 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev,
		goto err_out;
	}

	/* find maximum port id for allocating structures */
	max_port = ahci_platform_find_max_port_id(dev);
	/*
	 * Set nports according to maximum port id. Clamp at
	 * AHCI_MAX_PORTS, warning message for invalid port id
	 * is generated later.
	 * When DT has no sub-nodes max_port is 0, nports is 1,
	 * in order to be able to use the
	 * ahci_platform_[en|dis]able_[phys|regulators] functions.
	 */
	hpriv->nports = min(AHCI_MAX_PORTS, max_port + 1);

	hpriv->phys = devm_kcalloc(dev, hpriv->nports, sizeof(*hpriv->phys), GFP_KERNEL);
	if (!hpriv->phys) {
		rc = -ENOMEM;
		goto err_out;
	}
	/*
	 * We cannot use devm_ here, since ahci_platform_put_resources() uses
	 * target_pwrs after devm_ have freed memory
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