Commit 5aa24d72 authored by Benjamin Gaignard's avatar Benjamin Gaignard Committed by Mauro Carvalho Chehab
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media: hantro: postproc: Configure output regs to support 10bit 



Move output format setting in postproc and make sure that
8/10bit configuration is correctly set.

Signed-off-by: default avatarBenjamin Gaignard <benjamin.gaignard@collabora.com>
Reviewed-by: default avatarEzequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@kernel.org>
parent f64853ad

drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c

+0 −2
Original line number Diff line number Diff line
@@ -167,8 +167,6 @@ static void set_params(struct hantro_ctx *ctx) 
	hantro_reg_write(vpu, &g2_bit_depth_y_minus8, sps->bit_depth_luma_minus8);

	hantro_reg_write(vpu, &g2_bit_depth_c_minus8, sps->bit_depth_chroma_minus8);



	hantro_reg_write(vpu, &g2_output_8_bits, 0);



	hantro_reg_write(vpu, &g2_hdr_skip_length, compute_header_skip_length(ctx));



	min_log2_cb_size = sps->log2_min_luma_coding_block_size_minus3 + 3;

drivers/media/platform/verisilicon/hantro_postproc.c

+6 −1
Original line number Diff line number Diff line
@@ -114,6 +114,7 @@ static void hantro_postproc_g2_enable(struct hantro_ctx *ctx) 
	struct hantro_dev *vpu = ctx->dev;

	struct vb2_v4l2_buffer *dst_buf;

	int down_scale = down_scale_factor(ctx);

	int out_depth;

	size_t chroma_offset;

	dma_addr_t dst_dma;
@@ -132,8 +133,9 @@ static void hantro_postproc_g2_enable(struct hantro_ctx *ctx) 
		hantro_write_addr(vpu, G2_RS_OUT_LUMA_ADDR, dst_dma);

		hantro_write_addr(vpu, G2_RS_OUT_CHROMA_ADDR, dst_dma + chroma_offset);

	}



	out_depth = hantro_get_format_depth(ctx->dst_fmt.pixelformat);

	if (ctx->dev->variant->legacy_regs) {

		int out_depth = hantro_get_format_depth(ctx->dst_fmt.pixelformat);

		u8 pp_shift = 0;



		if (out_depth > 8)
@@ -141,6 +143,9 @@ static void hantro_postproc_g2_enable(struct hantro_ctx *ctx) 


		hantro_reg_write(ctx->dev, &g2_rs_out_bit_depth, out_depth);

		hantro_reg_write(ctx->dev, &g2_pp_pix_shift, pp_shift);

	} else {

		hantro_reg_write(vpu, &g2_output_8_bits, out_depth > 8 ? 0 : 1);

		hantro_reg_write(vpu, &g2_output_format, out_depth > 8 ? 1 : 0);

	}

	hantro_reg_write(vpu, &g2_out_rs_e, 1);

}