Commit 5acb9254 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Dinh Nguyen
Browse files

arm64: dts: altera: Use lowercase hex 



The DTS code coding style expects lowercase hex for values and unit
addresses.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: default avatarDinh Nguyen <dinguyen@kernel.org>
parent 1cb8486a

arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -382,7 +382,7 @@ pdma: dma-controller@ffda0000 { 


		pinctrl0: pinctrl@ffd13000 {

			compatible = "pinctrl-single";

			reg = <0xffd13000 0xA0>;

			reg = <0xffd13000 0xa0>;

			#pinctrl-cells = <1>;

			pinctrl-single,register-width = <32>;

			pinctrl-single,function-mask = <0x0000000f>;

arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts

+1 −1
Original line number Diff line number Diff line
@@ -192,7 +192,7 @@ qspi_boot: partition@0 { 


			root: partition@4200000 {

				label = "Root Filesystem - UBIFS";

				reg = <0x04200000 0x0BE00000>;

				reg = <0x04200000 0x0be00000>;

			};

		};

	};

arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts

+2 −2
Original line number Diff line number Diff line
@@ -174,12 +174,12 @@ partitions { 


			qspi_boot: partition@0 {

				label = "Boot and fpga data";

				reg = <0x0 0x03FE0000>;

				reg = <0x0 0x03fe0000>;

			};



			qspi_rootfs: partition@3fe0000 {

				label = "Root Filesystem - JFFS2";

				reg = <0x03FE0000 0x0C020000>;

				reg = <0x03fe0000 0x0c020000>;

			};

		};

	};

arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi

+24 −24
Original line number Diff line number Diff line
@@ -622,31 +622,31 @@ queue0 { 
					snps,dcb-algorithm;

				};

				queue1 {

					snps,weight = <0x0A>;

					snps,weight = <0x0a>;

					snps,dcb-algorithm;

				};

				queue2 {

					snps,weight = <0x0B>;

					snps,weight = <0x0b>;

					snps,coe-unsupported;

					snps,dcb-algorithm;

				};

				queue3 {

					snps,weight = <0x0C>;

					snps,weight = <0x0c>;

					snps,coe-unsupported;

					snps,dcb-algorithm;

				};

				queue4 {

					snps,weight = <0x0D>;

					snps,weight = <0x0d>;

					snps,coe-unsupported;

					snps,dcb-algorithm;

				};

				queue5 {

					snps,weight = <0x0E>;

					snps,weight = <0x0e>;

					snps,coe-unsupported;

					snps,dcb-algorithm;

				};

				queue6 {

					snps,weight = <0x0F>;

					snps,weight = <0x0f>;

					snps,coe-unsupported;

					snps,dcb-algorithm;

				};
@@ -735,31 +735,31 @@ queue0 { 
					snps,dcb-algorithm;

				};

				queue1 {

					snps,weight = <0x0A>;

					snps,weight = <0x0a>;

					snps,dcb-algorithm;

				};

				queue2 {

					snps,weight = <0x0B>;

					snps,weight = <0x0b>;

					snps,coe-unsupported;

					snps,dcb-algorithm;

				};

				queue3 {

					snps,weight = <0x0C>;

					snps,weight = <0x0c>;

					snps,coe-unsupported;

					snps,dcb-algorithm;

				};

				queue4 {

					snps,weight = <0x0D>;

					snps,weight = <0x0d>;

					snps,coe-unsupported;

					snps,dcb-algorithm;

				};

				queue5 {

					snps,weight = <0x0E>;

					snps,weight = <0x0e>;

					snps,coe-unsupported;

					snps,dcb-algorithm;

				};

				queue6 {

					snps,weight = <0x0F>;

					snps,weight = <0x0f>;

					snps,coe-unsupported;

					snps,dcb-algorithm;

				};
@@ -848,31 +848,31 @@ queue0 { 
					snps,dcb-algorithm;

				};

				queue1 {

					snps,weight = <0x0A>;

					snps,weight = <0x0a>;

					snps,dcb-algorithm;

				};

				queue2 {

					snps,weight = <0x0B>;

					snps,weight = <0x0b>;

					snps,coe-unsupported;

					snps,dcb-algorithm;

				};

				queue3 {

					snps,weight = <0x0C>;

					snps,weight = <0x0c>;

					snps,coe-unsupported;

					snps,dcb-algorithm;

				};

				queue4 {

					snps,weight = <0x0D>;

					snps,weight = <0x0d>;

					snps,coe-unsupported;

					snps,dcb-algorithm;

				};

				queue5 {

					snps,weight = <0x0E>;

					snps,weight = <0x0e>;

					snps,coe-unsupported;

					snps,dcb-algorithm;

				};

				queue6 {

					snps,weight = <0x0F>;

					snps,weight = <0x0f>;

					snps,coe-unsupported;

					snps,dcb-algorithm;

				};
@@ -918,24 +918,24 @@ pmu0_tbu2: pmu@16082000 { 


		pmu0_tbu3: pmu@160a2000 {

			compatible = "arm,smmu-v3-pmcg";

			reg = <0x160A2000 0x1000>,

				<0x160B2000 0x1000>;

			reg = <0x160a2000 0x1000>,

				<0x160b2000 0x1000>;

			interrupt-parent = <&intc>;

			interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>;

		};



		pmu0_tbu4: pmu@160c2000 {

			compatible = "arm,smmu-v3-pmcg";

			reg = <0x160C2000 0x1000>,

				<0x160D2000 0x1000>;

			reg = <0x160c2000 0x1000>,

				<0x160d2000 0x1000>;

			interrupt-parent = <&intc>;

			interrupts = <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>;

		};



		pmu0_tbu5: pmu@160e2000 {

			compatible = "arm,smmu-v3-pmcg";

			reg = <0x160E2000 0x1000>,

				<0x160F2000 0x1000>;

			reg = <0x160e2000 0x1000>,

				<0x160f2000 0x1000>;

			interrupt-parent = <&intc>;

			interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;

		};

arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts

+1 −1
Original line number Diff line number Diff line
@@ -131,7 +131,7 @@ qspi_boot: partition@0 { 


			root: partition@4200000 {

				label = "Root Filesystem - UBIFS";

				reg = <0x04200000 0x0BE00000>;

				reg = <0x04200000 0x0be00000>;

			};

		};

	};