Commit 5acd48fa authored by Hans Hu's avatar Hans Hu Committed by Andi Shyti
Browse files

i2c: wmt: split out common files 



Since the I2C IP of both wmt and zhaoxin originates from VIA,
it is better to separate the common code first.
The common driver is named as i2c-viai2c-common.c.
Old i2c-wmt.c renamed to i2c-viai2c-wmt.c.

The MAINTAINERS file will be updated accordingly in upcoming commits.

Reviewed-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: default avatarHans Hu <hanshu-oc@zhaoxin.com>
Signed-off-by: default avatarAndi Shyti <andi.shyti@kernel.org>
parent 8525205f

MAINTAINERS

+1 −1
Original line number Diff line number Diff line
@@ -3017,7 +3017,7 @@ S: Orphan 
F:	Documentation/devicetree/bindings/i2c/i2c-wmt.txt

F:	arch/arm/mach-vt8500/

F:	drivers/clocksource/timer-vt8500.c

F:	drivers/i2c/busses/i2c-wmt.c

F:	drivers/i2c/busses/i2c-viai2c-wmt.c

F:	drivers/mmc/host/wmt-sdmmc.c

F:	drivers/pwm/pwm-vt8500.c

F:	drivers/rtc/rtc-vt8500.c

drivers/i2c/busses/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -118,6 +118,7 @@ obj-$(CONFIG_I2C_TEGRA_BPMP) += i2c-tegra-bpmp.o 
obj-$(CONFIG_I2C_UNIPHIER)	+= i2c-uniphier.o

obj-$(CONFIG_I2C_UNIPHIER_F)	+= i2c-uniphier-f.o

obj-$(CONFIG_I2C_VERSATILE)	+= i2c-versatile.o

i2c-wmt-objs := i2c-viai2c-wmt.o i2c-viai2c-common.o

obj-$(CONFIG_I2C_WMT)		+= i2c-wmt.o

i2c-octeon-objs := i2c-octeon-core.o i2c-octeon-platdrv.o

obj-$(CONFIG_I2C_OCTEON)	+= i2c-octeon.o

drivers/i2c/busses/i2c-wmt.c→drivers/i2c/busses/i2c-viai2c-common.c

+221 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-or-later

/*

 *  Wondermedia I2C Master Mode Driver

 *

 *  Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>

 *

 *  Derived from GPLv2+ licensed source:

 *  - Copyright (C) 2008 WonderMedia Technologies, Inc.

 */



#include <linux/clk.h>

#include <linux/delay.h>

#include <linux/err.h>

#include <linux/i2c.h>

#include <linux/interrupt.h>

#include <linux/io.h>

#include <linux/module.h>

#include <linux/of.h>

#include <linux/of_address.h>

#include <linux/of_irq.h>

#include <linux/platform_device.h>



#define REG_CR		0x00

#define REG_TCR		0x02

#define REG_CSR		0x04

#define REG_ISR		0x06

#define REG_IMR		0x08

#define REG_CDR		0x0A

#define REG_TR		0x0C

#define REG_MCR		0x0E

#define REG_SLAVE_CR	0x10

#define REG_SLAVE_SR	0x12

#define REG_SLAVE_ISR	0x14

#define REG_SLAVE_IMR	0x16

#define REG_SLAVE_DR	0x18

#define REG_SLAVE_TR	0x1A



/* REG_CR Bit fields */

#define CR_TX_NEXT_ACK		0x0000

#define CR_ENABLE		0x0001

#define CR_TX_NEXT_NO_ACK	0x0002

#define CR_TX_END		0x0004

#define CR_CPU_RDY		0x0008

#define SLAV_MODE_SEL		0x8000



/* REG_TCR Bit fields */

#define TCR_STANDARD_MODE	0x0000

#define TCR_MASTER_WRITE	0x0000

#define TCR_HS_MODE		0x2000

#define TCR_MASTER_READ		0x4000

#define TCR_FAST_MODE		0x8000

#define TCR_SLAVE_ADDR_MASK	0x007F



/* REG_ISR Bit fields */

#define ISR_NACK_ADDR		0x0001

#define ISR_BYTE_END		0x0002

#define ISR_SCL_TIMEOUT		0x0004

#define ISR_WRITE_ALL		0x0007



/* REG_IMR Bit fields */

#define IMR_ENABLE_ALL		0x0007



/* REG_CSR Bit fields */

#define CSR_RCV_NOT_ACK		0x0001

#define CSR_RCV_ACK_MASK	0x0001

#define CSR_READY_MASK		0x0002



/* REG_TR */

#define SCL_TIMEOUT(x)		(((x) & 0xFF) << 8)

#define TR_STD			0x0064

#define TR_HS			0x0019



/* REG_MCR */

#define MCR_APB_96M		7

#define MCR_APB_166M		12



#define WMT_I2C_TIMEOUT		(msecs_to_jiffies(1000))



struct wmt_i2c_dev {

	struct i2c_adapter	adapter;

	struct completion	complete;

	struct device		*dev;

	void __iomem		*base;

	struct clk		*clk;

	u16			tcr;

	int			irq;

	u16			cmd_status;

};



static int wmt_i2c_wait_bus_not_busy(struct wmt_i2c_dev *i2c_dev)

#include "i2c-viai2c-common.h"



int wmt_i2c_wait_bus_not_busy(struct wmt_i2c_dev *i2c_dev)

{

	unsigned long timeout;
@@ -103,7 +18,7 @@ static int wmt_i2c_wait_bus_not_busy(struct wmt_i2c_dev *i2c_dev) 
	return 0;

}



static int wmt_check_status(struct wmt_i2c_dev *i2c_dev)

int wmt_check_status(struct wmt_i2c_dev *i2c_dev)

{

	int ret = 0;

	unsigned long wait_result;
@@ -122,8 +37,7 @@ static int wmt_check_status(struct wmt_i2c_dev *i2c_dev) 
	return ret;

}



static int wmt_i2c_write(struct wmt_i2c_dev *i2c_dev, struct i2c_msg *pmsg,

			 int last)

static int wmt_i2c_write(struct wmt_i2c_dev *i2c_dev, struct i2c_msg *pmsg, int last)

{

	u16 val, tcr_val = i2c_dev->tcr;

	int ret;
@@ -237,9 +151,7 @@ static int wmt_i2c_read(struct wmt_i2c_dev *i2c_dev, struct i2c_msg *pmsg) 
	return 0;

}



static int wmt_i2c_xfer(struct i2c_adapter *adap,

			struct i2c_msg msgs[],

			int num)

int wmt_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)

{

	struct i2c_msg *pmsg;

	int i;
@@ -263,16 +175,6 @@ static int wmt_i2c_xfer(struct i2c_adapter *adap, 
	return (ret < 0) ? ret : i;

}



static u32 wmt_i2c_func(struct i2c_adapter *adap)

{

	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_NOSTART;

}



static const struct i2c_algorithm wmt_i2c_algo = {

	.master_xfer	= wmt_i2c_xfer,

	.functionality	= wmt_i2c_func,

};



static irqreturn_t wmt_i2c_isr(int irq, void *data)

{

	struct wmt_i2c_dev *i2c_dev = data;
@@ -286,7 +188,7 @@ static irqreturn_t wmt_i2c_isr(int irq, void *data) 
	return IRQ_HANDLED;

}



static int wmt_i2c_init(struct platform_device *pdev, struct wmt_i2c_dev **pi2c_dev)

int wmt_i2c_init(struct platform_device *pdev, struct wmt_i2c_dev **pi2c_dev)

{

	int err;

	struct wmt_i2c_dev *i2c_dev;
@@ -317,114 +219,3 @@ static int wmt_i2c_init(struct platform_device *pdev, struct wmt_i2c_dev **pi2c_ 
	*pi2c_dev = i2c_dev;

	return 0;

}
 


static int wmt_i2c_reset_hardware(struct wmt_i2c_dev *i2c_dev)

{

	int err;



	err = clk_prepare_enable(i2c_dev->clk);

	if (err) {

		dev_err(i2c_dev->dev, "failed to enable clock\n");

		return err;

	}



	err = clk_set_rate(i2c_dev->clk, 20000000);

	if (err) {

		dev_err(i2c_dev->dev, "failed to set clock = 20Mhz\n");

		clk_disable_unprepare(i2c_dev->clk);

		return err;

	}



	writew(0, i2c_dev->base + REG_CR);

	writew(MCR_APB_166M, i2c_dev->base + REG_MCR);

	writew(ISR_WRITE_ALL, i2c_dev->base + REG_ISR);

	writew(IMR_ENABLE_ALL, i2c_dev->base + REG_IMR);

	writew(CR_ENABLE, i2c_dev->base + REG_CR);

	readw(i2c_dev->base + REG_CSR);		/* read clear */

	writew(ISR_WRITE_ALL, i2c_dev->base + REG_ISR);



	if (i2c_dev->tcr == TCR_FAST_MODE)

		writew(SCL_TIMEOUT(128) | TR_HS, i2c_dev->base + REG_TR);

	else

		writew(SCL_TIMEOUT(128) | TR_STD, i2c_dev->base + REG_TR);



	return 0;

}



static int wmt_i2c_probe(struct platform_device *pdev)

{

	struct device_node *np = pdev->dev.of_node;

	struct wmt_i2c_dev *i2c_dev;

	struct i2c_adapter *adap;

	int err;

	u32 clk_rate;



	err = wmt_i2c_init(pdev, &i2c_dev);

	if (err)

		return err;



	i2c_dev->clk = of_clk_get(np, 0);

	if (IS_ERR(i2c_dev->clk)) {

		dev_err(&pdev->dev, "unable to request clock\n");

		return PTR_ERR(i2c_dev->clk);

	}



	err = of_property_read_u32(np, "clock-frequency", &clk_rate);

	if (!err && clk_rate == I2C_MAX_FAST_MODE_FREQ)

		i2c_dev->tcr = TCR_FAST_MODE;



	adap = &i2c_dev->adapter;

	i2c_set_adapdata(adap, i2c_dev);

	strscpy(adap->name, "WMT I2C adapter", sizeof(adap->name));

	adap->owner = THIS_MODULE;

	adap->algo = &wmt_i2c_algo;

	adap->dev.parent = &pdev->dev;

	adap->dev.of_node = pdev->dev.of_node;



	err = wmt_i2c_reset_hardware(i2c_dev);

	if (err) {

		dev_err(&pdev->dev, "error initializing hardware\n");

		return err;

	}



	err = i2c_add_adapter(adap);

	if (err)

		goto err_disable_clk;



	return 0;



err_disable_clk:

	clk_disable_unprepare(i2c_dev->clk);

	return err;

}



static void wmt_i2c_remove(struct platform_device *pdev)

{

	struct wmt_i2c_dev *i2c_dev = platform_get_drvdata(pdev);



	/* Disable interrupts, clock and delete adapter */

	writew(0, i2c_dev->base + REG_IMR);

	clk_disable_unprepare(i2c_dev->clk);

	i2c_del_adapter(&i2c_dev->adapter);

}



static const struct of_device_id wmt_i2c_dt_ids[] = {

	{ .compatible = "wm,wm8505-i2c" },

	{ /* Sentinel */ },

};



static struct platform_driver wmt_i2c_driver = {

	.probe		= wmt_i2c_probe,

	.remove_new	= wmt_i2c_remove,

	.driver		= {

		.name	= "wmt-i2c",

		.of_match_table = wmt_i2c_dt_ids,

	},

};



module_platform_driver(wmt_i2c_driver);



MODULE_DESCRIPTION("Wondermedia I2C master-mode bus adapter");

MODULE_AUTHOR("Tony Prisk <linux@prisktech.co.nz>");

MODULE_LICENSE("GPL");

MODULE_DEVICE_TABLE(of, wmt_i2c_dt_ids);

drivers/i2c/busses/i2c-viai2c-common.h

0 → 100644
+71 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-or-later */

#ifndef __I2C_VIAI2C_COMMON_H_

#define __I2C_VIAI2C_COMMON_H_



#include <linux/delay.h>

#include <linux/err.h>

#include <linux/i2c.h>

#include <linux/interrupt.h>

#include <linux/io.h>

#include <linux/module.h>

#include <linux/of_irq.h>

#include <linux/platform_device.h>



#define REG_CR		0x00

#define REG_TCR		0x02

#define REG_CSR		0x04

#define REG_ISR		0x06

#define REG_IMR		0x08

#define REG_CDR		0x0A

#define REG_TR		0x0C

#define REG_MCR		0x0E



/* REG_CR Bit fields */

#define CR_TX_NEXT_ACK		0x0000

#define CR_ENABLE		0x0001

#define CR_TX_NEXT_NO_ACK	0x0002

#define CR_TX_END		0x0004

#define CR_CPU_RDY		0x0008

#define SLAV_MODE_SEL		0x8000



/* REG_TCR Bit fields */

#define TCR_STANDARD_MODE	0x0000

#define TCR_MASTER_WRITE	0x0000

#define TCR_HS_MODE		0x2000

#define TCR_MASTER_READ		0x4000

#define TCR_FAST_MODE		0x8000

#define TCR_SLAVE_ADDR_MASK	0x007F



/* REG_ISR Bit fields */

#define ISR_NACK_ADDR		0x0001

#define ISR_BYTE_END		0x0002

#define ISR_SCL_TIMEOUT		0x0004

#define ISR_WRITE_ALL		0x0007



/* REG_IMR Bit fields */

#define IMR_ENABLE_ALL		0x0007



/* REG_CSR Bit fields */

#define CSR_RCV_NOT_ACK		0x0001

#define CSR_RCV_ACK_MASK	0x0001

#define CSR_READY_MASK		0x0002



#define WMT_I2C_TIMEOUT		(msecs_to_jiffies(1000))



struct wmt_i2c_dev {

	struct i2c_adapter	adapter;

	struct completion	complete;

	struct device		*dev;

	void __iomem		*base;

	struct clk		*clk;

	u16			tcr;

	int			irq;

	u16			cmd_status;

};



int wmt_i2c_wait_bus_not_busy(struct wmt_i2c_dev *i2c_dev);

int wmt_check_status(struct wmt_i2c_dev *i2c_dev);

int wmt_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num);

int wmt_i2c_init(struct platform_device *pdev, struct wmt_i2c_dev **pi2c_dev);



#endif

drivers/i2c/busses/i2c-viai2c-wmt.c

0 → 100644
+148 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-or-later

/*

 *  Wondermedia I2C Master Mode Driver

 *

 *  Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>

 *

 *  Derived from GPLv2+ licensed source:

 *  - Copyright (C) 2008 WonderMedia Technologies, Inc.

 */



#include <linux/clk.h>

#include <linux/of.h>

#include <linux/of_address.h>

#include "i2c-viai2c-common.h"



#define REG_SLAVE_CR	0x10

#define REG_SLAVE_SR	0x12

#define REG_SLAVE_ISR	0x14

#define REG_SLAVE_IMR	0x16

#define REG_SLAVE_DR	0x18

#define REG_SLAVE_TR	0x1A



/* REG_TR */

#define SCL_TIMEOUT(x)		(((x) & 0xFF) << 8)

#define TR_STD			0x0064

#define TR_HS			0x0019



/* REG_MCR */

#define MCR_APB_96M		7

#define MCR_APB_166M		12



static u32 wmt_i2c_func(struct i2c_adapter *adap)

{

	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_NOSTART;

}



static const struct i2c_algorithm wmt_i2c_algo = {

	.master_xfer	= wmt_i2c_xfer,

	.functionality	= wmt_i2c_func,

};



static int wmt_i2c_reset_hardware(struct wmt_i2c_dev *i2c_dev)

{

	int err;



	err = clk_prepare_enable(i2c_dev->clk);

	if (err) {

		dev_err(i2c_dev->dev, "failed to enable clock\n");

		return err;

	}



	err = clk_set_rate(i2c_dev->clk, 20000000);

	if (err) {

		dev_err(i2c_dev->dev, "failed to set clock = 20Mhz\n");

		clk_disable_unprepare(i2c_dev->clk);

		return err;

	}



	writew(0, i2c_dev->base + REG_CR);

	writew(MCR_APB_166M, i2c_dev->base + REG_MCR);

	writew(ISR_WRITE_ALL, i2c_dev->base + REG_ISR);

	writew(IMR_ENABLE_ALL, i2c_dev->base + REG_IMR);

	writew(CR_ENABLE, i2c_dev->base + REG_CR);

	readw(i2c_dev->base + REG_CSR);		/* read clear */

	writew(ISR_WRITE_ALL, i2c_dev->base + REG_ISR);



	if (i2c_dev->tcr == TCR_FAST_MODE)

		writew(SCL_TIMEOUT(128) | TR_HS, i2c_dev->base + REG_TR);

	else

		writew(SCL_TIMEOUT(128) | TR_STD, i2c_dev->base + REG_TR);



	return 0;

}



static int wmt_i2c_probe(struct platform_device *pdev)

{

	struct device_node *np = pdev->dev.of_node;

	struct wmt_i2c_dev *i2c_dev;

	struct i2c_adapter *adap;

	int err;

	u32 clk_rate;



	err = wmt_i2c_init(pdev, &i2c_dev);

	if (err)

		return err;



	i2c_dev->clk = of_clk_get(np, 0);

	if (IS_ERR(i2c_dev->clk)) {

		dev_err(&pdev->dev, "unable to request clock\n");

		return PTR_ERR(i2c_dev->clk);

	}



	err = of_property_read_u32(np, "clock-frequency", &clk_rate);

	if (!err && clk_rate == I2C_MAX_FAST_MODE_FREQ)

		i2c_dev->tcr = TCR_FAST_MODE;



	adap = &i2c_dev->adapter;

	i2c_set_adapdata(adap, i2c_dev);

	strscpy(adap->name, "WMT I2C adapter", sizeof(adap->name));

	adap->owner = THIS_MODULE;

	adap->algo = &wmt_i2c_algo;

	adap->dev.parent = &pdev->dev;

	adap->dev.of_node = pdev->dev.of_node;



	err = wmt_i2c_reset_hardware(i2c_dev);

	if (err) {

		dev_err(&pdev->dev, "error initializing hardware\n");

		return err;

	}



	err = i2c_add_adapter(adap);

	if (err)

		/* wmt_i2c_reset_hardware() enables i2c_dev->clk */

		clk_disable_unprepare(i2c_dev->clk);



	return err;

}



static void wmt_i2c_remove(struct platform_device *pdev)

{

	struct wmt_i2c_dev *i2c_dev = platform_get_drvdata(pdev);



	/* Disable interrupts, clock and delete adapter */

	writew(0, i2c_dev->base + REG_IMR);

	clk_disable_unprepare(i2c_dev->clk);

	i2c_del_adapter(&i2c_dev->adapter);

}



static const struct of_device_id wmt_i2c_dt_ids[] = {

	{ .compatible = "wm,wm8505-i2c" },

	{ /* Sentinel */ },

};



static struct platform_driver wmt_i2c_driver = {

	.probe		= wmt_i2c_probe,

	.remove_new	= wmt_i2c_remove,

	.driver		= {

		.name	= "wmt-i2c",

		.of_match_table = wmt_i2c_dt_ids,

	},

};



module_platform_driver(wmt_i2c_driver);



MODULE_DESCRIPTION("Wondermedia I2C master-mode bus adapter");

MODULE_AUTHOR("Tony Prisk <linux@prisktech.co.nz>");

MODULE_LICENSE("GPL");

MODULE_DEVICE_TABLE(of, wmt_i2c_dt_ids);