Commit 5b0766f2 authored by Shunlu Zhang's avatar Shunlu Zhang Committed by Alex Deucher
Browse files

drm/amd/display: delete legacy code 



Delete unused code.

Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: default avatarJun Lei <jun.lei@amd.com>
Signed-off-by: default avatarShunlu Zhang <Shunlu.Zhang@amd.com>
Signed-off-by: default avatarRodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b486bc9e

drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c

+1 −0
Original line number Diff line number Diff line
@@ -1562,6 +1562,7 @@ static void dml_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib, 
	dml_print("DML_DLG: %s: disp_dlg_regs->dst_y_per_row_vblank = 0x%x\n", __func__, disp_dlg_regs->dst_y_per_row_vblank);

	dml_print("DML_DLG: %s: disp_dlg_regs->dst_y_per_vm_flip    = 0x%x\n", __func__, disp_dlg_regs->dst_y_per_vm_flip);

	dml_print("DML_DLG: %s: disp_dlg_regs->dst_y_per_row_flip   = 0x%x\n", __func__, disp_dlg_regs->dst_y_per_row_flip);



	disp_dlg_regs->refcyc_per_pte_group_vblank_l =

		(unsigned int)(dst_y_per_row_vblank * (double)htotal

			* ref_freq_to_pix_freq / (double)dpte_groups_per_row_ub_l);

drivers/gpu/drm/amd/display/dc/dml2/dml_display_rq_dlg_calc.c

+0 −12
Original line number Diff line number Diff line
@@ -427,18 +427,6 @@ void dml_rq_dlg_get_dlg_reg(dml_display_dlg_regs_st *disp_dlg_regs, 
	dml_print("DML_DLG: %s: disp_dlg_regs->dst_y_per_vm_flip	= 0x%x\n", __func__, disp_dlg_regs->dst_y_per_vm_flip);

	dml_print("DML_DLG: %s: disp_dlg_regs->dst_y_per_row_flip	= 0x%x\n", __func__, disp_dlg_regs->dst_y_per_row_flip);



	// hack for FPGA

	/* NOTE: We dont have getenv defined in driver and it does not make any sense in the driver */

	/*char* fpga_env = getenv("FPGA_FPDIV");

	if(fpga_env !=NULL)

	{

		if(disp_dlg_regs->vratio_prefetch >= (dml_uint_t)dml_pow(2, 22))

		{

			disp_dlg_regs->vratio_prefetch = (dml_uint_t)dml_pow(2, 22)-1;

			dml_print("FPGA msg: vratio_prefetch exceed the max value, the register field is [21:0]\n");

		}

	}*/



	disp_dlg_regs->refcyc_per_vm_group_vblank		= (dml_uint_t)(dml_get_refcyc_per_vm_group_vblank_in_us(mode_lib, pipe_idx) * refclk_freq_in_mhz);

	disp_dlg_regs->refcyc_per_vm_group_flip			= (dml_uint_t)(dml_get_refcyc_per_vm_group_flip_in_us(mode_lib, pipe_idx) * refclk_freq_in_mhz);

	disp_dlg_regs->refcyc_per_vm_req_vblank			= (dml_uint_t)(dml_get_refcyc_per_vm_req_vblank_in_us(mode_lib, pipe_idx) * refclk_freq_in_mhz * dml_pow(2, 10));