Commit 5b0c5945 authored by Manasi Navare's avatar Manasi Navare
Browse files

drm/i915/display/vrr: Create VRR file and add VRR capability check 



We create a new file for all VRR related helpers.
Also add a function to check vrr capability based on
platform support, DPCD bits and EDID monitor range.

v2:
* Remove author (Jani N)
* Define HAS_VRR (Jani N)
* Ensure intel_dp can be obtained from conn (Jani N)

v3:
* Fix the header indent (Manasi)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarManasi Navare <manasi.d.navare@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210125200818.2015-1-manasi.d.navare@intel.com
parent d1e2775e

drivers/gpu/drm/i915/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -260,6 +260,7 @@ i915-y += \ 
	display/intel_sdvo.o \

	display/intel_tv.o \

	display/intel_vdsc.o \

	display/intel_vrr.o \

	display/vlv_dsi.o \

	display/vlv_dsi_pll.o

drivers/gpu/drm/i915/display/intel_vrr.c

0 → 100644
+31 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: MIT

/*

 * Copyright © 2020 Intel Corporation

 *

 */



#include "i915_drv.h"

#include "intel_display_types.h"

#include "intel_vrr.h"



bool intel_vrr_is_capable(struct drm_connector *connector)

{

	struct intel_dp *intel_dp;

	const struct drm_display_info *info = &connector->display_info;

	struct drm_i915_private *i915 = to_i915(connector->dev);



	if (connector->connector_type != DRM_MODE_CONNECTOR_eDP &&

	    connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)

		return false;



	intel_dp = intel_attached_dp(to_intel_connector(connector));

	/*

	 * DP Sink is capable of Variable refresh video timings if

	 * Ignore MSA bit is set in DPCD.

	 * EDID monitor range also should be atleast 10 for reasonable

	 * Adaptive sync/ VRR end user experience.

	 */

	return HAS_VRR(i915) &&

		drm_dp_sink_can_do_video_without_timing_msa(intel_dp->dpcd) &&

		info->monitor_range.max_vfreq - info->monitor_range.min_vfreq > 10;

}

drivers/gpu/drm/i915/display/intel_vrr.h

0 → 100644
+15 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: MIT */

/*

 * Copyright © 2019 Intel Corporation

 */



#ifndef __INTEL_VRR_H__

#define __INTEL_VRR_H__



#include <linux/types.h>



struct drm_connector;



bool intel_vrr_is_capable(struct drm_connector *connector);



#endif /* __INTEL_VRR_H__ */

drivers/gpu/drm/i915/i915_drv.h

+2 −0
Original line number Diff line number Diff line
@@ -1758,6 +1758,8 @@ tgl_revids_get(struct drm_i915_private *dev_priv) 


#define HAS_DISPLAY(dev_priv) (INTEL_INFO(dev_priv)->pipe_mask != 0)



#define HAS_VRR(i915)	(INTEL_GEN(i915) >= 12)



/* Only valid when HAS_DISPLAY() is true */

#define INTEL_DISPLAY_ENABLED(dev_priv) \

	(drm_WARN_ON(&(dev_priv)->drm, !HAS_DISPLAY(dev_priv)), !(dev_priv)->params.disable_display)