Unverified Commit 5b376a68 authored by Alexandre Ghiti's avatar Alexandre Ghiti
Browse files

Merge patch series "riscv: add support for Zaamo and Zalrsc extensions" 

Clément Léger <cleger@rivosinc.com> says:

Since commit e87412e621f1 ("integrate Zaamo and Zalrsc text (#1304)"),
the A extension has been described as a set of instructions provided by
Zaamo and Zalrsc. Add these two extensions.

This series is based on the Zc one [1].

Link: https://lore.kernel.org/linux-riscv/20240619113529.676940-1-cleger@rivosinc.com/ [1]

* patches from https://lore.kernel.org/lkml/20240619153913.867263-1-cleger@rivosinc.com/:
  dt-bindings: riscv: add Zaamo and Zalrsc ISA extension description
  riscv: add parsing for Zaamo and Zalrsc extensions
  riscv: hwprobe: export Zaamo and Zalrsc extensions
  RISC-V: KVM: Allow Zaamo/Zalrsc extensions for Guest/VM
  KVM: riscv: selftests: Add Zaamo/Zalrsc extensions to get-reg-list
test

Link: https://lore.kernel.org/lkml/20240619153913.867263-1-cleger@rivosinc.com/


Signed-off-by: default avatarAlexandre Ghiti <alexghiti@rivosinc.com>
parents 67a5ba8f 7a9827e7

Documentation/arch/riscv/hwprobe.rst

+8 −0
Original line number Diff line number Diff line
@@ -245,6 +245,14 @@ The following keys are defined: 
       ratified in commit 98918c844281 ("Merge pull request #1217 from

       riscv/zawrs") of riscv-isa-manual.



  * :c:macro:`RISCV_HWPROBE_EXT_ZAAMO`: The Zaamo extension is supported as

       defined in the in the RISC-V ISA manual starting from commit e87412e621f1

       ("integrate Zaamo and Zalrsc text (#1304)").



  * :c:macro:`RISCV_HWPROBE_EXT_ZALRSC`: The Zalrsc extension is supported as

       defined in the in the RISC-V ISA manual starting from commit e87412e621f1

       ("integrate Zaamo and Zalrsc text (#1304)").



  * :c:macro:`RISCV_HWPROBE_EXT_SUPM`: The Supm extension is supported as

       defined in version 1.0 of the RISC-V Pointer Masking extensions.

Documentation/devicetree/bindings/riscv/extensions.yaml

+19 −0
Original line number Diff line number Diff line
@@ -224,6 +224,12 @@ properties: 
            as ratified at commit 4a69197e5617 ("Update to ratified state") of

            riscv-svvptc.



        - const: zaamo

          description: |

            The standard Zaamo extension for atomic memory operations as

            ratified at commit e87412e621f1 ("integrate Zaamo and Zalrsc text

            (#1304)") of the unprivileged ISA specification.



        - const: zabha

          description: |

            The Zabha extension for Byte and Halfword Atomic Memory Operations
@@ -236,6 +242,12 @@ properties: 
            is supported as ratified at commit 5059e0ca641c ("update to

            ratified") of the riscv-zacas.



        - const: zalrsc

          description: |

            The standard Zalrsc extension for load-reserved/store-conditional as

            ratified at commit e87412e621f1 ("integrate Zaamo and Zalrsc text

            (#1304)") of the unprivileged ISA specification.



        - const: zawrs

          description: |

            The Zawrs extension for entering a low-power state or for trapping
@@ -718,6 +730,13 @@ properties: 
                const: zfbfmin

            - contains:

                const: zvfbfmin

      # Zacas depends on Zaamo

      - if:

          contains:

            const: zacas

        then:

          contains:

            const: zaamo



allOf:

  # Zcf extension does not exist on rv64

arch/riscv/include/asm/hwcap.h

+2 −0
Original line number Diff line number Diff line
@@ -103,6 +103,8 @@ 
#define RISCV_ISA_EXT_ZFBFMIN		94

#define RISCV_ISA_EXT_ZVFBFMIN		95

#define RISCV_ISA_EXT_ZVFBFWMA		96

#define RISCV_ISA_EXT_ZAAMO		97

#define RISCV_ISA_EXT_ZALRSC		98



#define RISCV_ISA_EXT_XLINUXENVCFG	127

arch/riscv/include/uapi/asm/hwprobe.h

+2 −0
Original line number Diff line number Diff line
@@ -79,6 +79,8 @@ struct riscv_hwprobe { 
#define		RISCV_HWPROBE_EXT_ZVFBFMIN	(1ULL << 53)

#define		RISCV_HWPROBE_EXT_ZVFBFWMA	(1ULL << 54)

#define		RISCV_HWPROBE_EXT_ZICBOM	(1ULL << 55)

#define		RISCV_HWPROBE_EXT_ZAAMO		(1ULL << 56)

#define		RISCV_HWPROBE_EXT_ZALRSC	(1ULL << 57)

#define RISCV_HWPROBE_KEY_CPUPERF_0	5

#define		RISCV_HWPROBE_MISALIGNED_UNKNOWN	(0 << 0)

#define		RISCV_HWPROBE_MISALIGNED_EMULATED	(1 << 0)

arch/riscv/include/uapi/asm/kvm.h

+2 −0
Original line number Diff line number Diff line
@@ -182,6 +182,8 @@ enum KVM_RISCV_ISA_EXT_ID { 
	KVM_RISCV_ISA_EXT_SVVPTC,

	KVM_RISCV_ISA_EXT_ZABHA,

	KVM_RISCV_ISA_EXT_ZICCRSE,

	KVM_RISCV_ISA_EXT_ZAAMO,

	KVM_RISCV_ISA_EXT_ZALRSC,

	KVM_RISCV_ISA_EXT_MAX,

};