Unverified Commit 5b4d64a8 authored by Clément Léger's avatar Clément Léger Committed by Palmer Dabbelt
Browse files

riscv: hwprobe: export Ztso ISA extension 



Export the Ztso extension to userspace.

Signed-off-by: default avatarClément Léger <cleger@rivosinc.com>
Link: https://lore.kernel.org/r/20231220155723.684081-3-cleger@rivosinc.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 1ec9f381

Documentation/arch/riscv/hwprobe.rst

+4 −0
Original line number Diff line number Diff line
@@ -161,6 +161,10 @@ The following keys are defined: 
       defined in the RISC-V ISA manual starting from commit 056b6ff467c7

       ("Zfa is ratified").



  * :c:macro:`RISCV_HWPROBE_EXT_ZTSO`: The Ztso extension is supported as

       defined in the RISC-V ISA manual starting from commit 5618fb5a216b

       ("Ztso is now ratified.")



* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance

  information about the selected set of processors.

arch/riscv/include/uapi/asm/hwprobe.h

+1 −0
Original line number Diff line number Diff line
@@ -56,6 +56,7 @@ struct riscv_hwprobe { 
#define		RISCV_HWPROBE_EXT_ZVFH		(1 << 30)

#define		RISCV_HWPROBE_EXT_ZVFHMIN	(1 << 31)

#define		RISCV_HWPROBE_EXT_ZFA		(1ULL << 32)

#define		RISCV_HWPROBE_EXT_ZTSO		(1ULL << 33)

#define RISCV_HWPROBE_KEY_CPUPERF_0	5

#define		RISCV_HWPROBE_MISALIGNED_UNKNOWN	(0 << 0)

#define		RISCV_HWPROBE_MISALIGNED_EMULATED	(1 << 0)

arch/riscv/kernel/sys_riscv.c

+1 −0
Original line number Diff line number Diff line
@@ -174,6 +174,7 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, 
		EXT_KEY(ZKSH);

		EXT_KEY(ZKT);

		EXT_KEY(ZIHINTNTL);

		EXT_KEY(ZTSO);



		if (has_vector()) {

			EXT_KEY(ZVBB);