Commit 5b7bee5b authored by Ilya Bakoulin's avatar Ilya Bakoulin Committed by Alex Deucher
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drm/amd/display: Workaround wrong HDR colorimetry with some receivers



[Why]
Some scalers do not pick up color space updates unless the DP link
is disabled/re-enabled which can result in incorrect/washed out
HDR colors in some cases.

[How]
Call set_dpms_on to disable the link, re-train and re-enable with the
updated output color space.

Reviewed-by: default avatarAric Cyr <Aric.Cyr@amd.com>
Acked-by: default avatarAlan Liu <HaoPing.Liu@amd.com>
Signed-off-by: default avatarIlya Bakoulin <Ilya.Bakoulin@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9ab367f8
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+7 −0
Original line number Diff line number Diff line
@@ -3268,6 +3268,13 @@ static void commit_planes_do_stream_update(struct dc *dc,
						dc->hwss.prepare_bandwidth(dc, dc->current_state);
					dc->link_srv->set_dpms_on(dc->current_state, pipe_ctx);
				}
			} else if (pipe_ctx->stream->link->wa_flags.blank_stream_on_ocs_change && stream_update->output_color_space
					&& !stream->dpms_off && dc_is_dp_signal(pipe_ctx->stream->signal)) {
				/*
				 * Workaround for firmware issue in some receivers where they don't pick up
				 * correct output color space unless DP link is disabled/re-enabled
				 */
				dc->link_srv->set_dpms_on(dc->current_state, pipe_ctx);
			}

			if (stream_update->abm_level && pipe_ctx->stream_res.abm) {
+1 −0
Original line number Diff line number Diff line
@@ -1506,6 +1506,7 @@ struct dc_link {
		/* Forced DPIA into TBT3 compatibility mode. */
		bool dpia_forced_tbt3_mode;
		bool dongle_mode_timing_override;
		bool blank_stream_on_ocs_change;
	} wa_flags;
	struct link_mst_stream_allocation_table mst_stream_alloc_table;