Commit 5bd6cf00 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull MIPS fixes from Thomas Bogendoerfer:

 - Set correct timer mode on Loongson64

 - Only request r4k clockevent interrupt on one CPU

* tag 'mips-fixes_6.11_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
  MIPS: cevt-r4k: Don't call get_c0_compare_int if timer irq is installed
  MIPS: Loongson64: Set timer mode in cpu-probe
parents a8a8dcbd 50f2b98d
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+7 −8
Original line number Diff line number Diff line
@@ -303,13 +303,6 @@ int r4k_clockevent_init(void)
	if (!c0_compare_int_usable())
		return -ENXIO;

	/*
	 * With vectored interrupts things are getting platform specific.
	 * get_c0_compare_int is a hook to allow a platform to return the
	 * interrupt number of its liking.
	 */
	irq = get_c0_compare_int();

	cd = &per_cpu(mips_clockevent_device, cpu);

	cd->name		= "MIPS";
@@ -320,7 +313,6 @@ int r4k_clockevent_init(void)
	min_delta		= calculate_min_delta();

	cd->rating		= 300;
	cd->irq			= irq;
	cd->cpumask		= cpumask_of(cpu);
	cd->set_next_event	= mips_next_event;
	cd->event_handler	= mips_event_handler;
@@ -332,6 +324,13 @@ int r4k_clockevent_init(void)

	cp0_timer_irq_installed = 1;

	/*
	 * With vectored interrupts things are getting platform specific.
	 * get_c0_compare_int is a hook to allow a platform to return the
	 * interrupt number of its liking.
	 */
	irq = get_c0_compare_int();

	if (request_irq(irq, c0_compare_interrupt, flags, "timer",
			c0_compare_interrupt))
		pr_err("Failed to request irq %d (timer)\n", irq);
+4 −0
Original line number Diff line number Diff line
@@ -1724,12 +1724,16 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
		c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
			MIPS_ASE_LOONGSON_EXT | MIPS_ASE_LOONGSON_EXT2);
		c->ases &= ~MIPS_ASE_VZ; /* VZ of Loongson-3A2000/3000 is incomplete */
		change_c0_config6(LOONGSON_CONF6_EXTIMER | LOONGSON_CONF6_INTIMER,
				  LOONGSON_CONF6_INTIMER);
		break;
	case PRID_IMP_LOONGSON_64G:
		__cpu_name[cpu] = "ICT Loongson-3";
		set_elf_platform(cpu, "loongson3a");
		set_isa(c, MIPS_CPU_ISA_M64R2);
		decode_cpucfg(c);
		change_c0_config6(LOONGSON_CONF6_EXTIMER | LOONGSON_CONF6_INTIMER,
				  LOONGSON_CONF6_INTIMER);
		break;
	default:
		panic("Unknown Loongson Processor ID!");