Commit 5befb6fc authored by Huang Rui's avatar Huang Rui Committed by Alex Deucher
Browse files

drm/amdgpu: add member to store vm fault interrupt masks 



This patch adds a member in vmhub structure to store the vm fault interrupt
masks for different version gfxhubs/mmhubs.

Signed-off-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 799a2fbb

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h

+2 −0
Original line number Diff line number Diff line
@@ -92,6 +92,8 @@ struct amdgpu_vmhub { 
	uint32_t	ctx_addr_distance; /* include LO32/HI32 */

	uint32_t	eng_distance;

	uint32_t	eng_addr_distance; /* include LO32/HI32 */



	uint32_t	vm_cntx_cntl_vm_fault;

};



/*

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

+8 −0
Original line number Diff line number Diff line
@@ -390,4 +390,12 @@ void gfxhub_v2_0_init(struct amdgpu_device *adev) 
		mmGCVM_INVALIDATE_ENG0_REQ;

	hub->eng_addr_distance = mmGCVM_INVALIDATE_ENG1_ADDR_RANGE_LO32 -

		mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32;



	hub->vm_cntx_cntl_vm_fault = GCVM_CONTEXT1_CNTL__RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		GCVM_CONTEXT1_CNTL__DUMMY_PAGE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		GCVM_CONTEXT1_CNTL__PDE0_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		GCVM_CONTEXT1_CNTL__VALID_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		GCVM_CONTEXT1_CNTL__READ_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		GCVM_CONTEXT1_CNTL__WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		GCVM_CONTEXT1_CNTL__EXECUTE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK;

}

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

+8 −0
Original line number Diff line number Diff line
@@ -389,6 +389,14 @@ void gfxhub_v2_1_init(struct amdgpu_device *adev) 
		mmGCVM_INVALIDATE_ENG0_REQ;

	hub->eng_addr_distance = mmGCVM_INVALIDATE_ENG1_ADDR_RANGE_LO32 -

		mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32;



	hub->vm_cntx_cntl_vm_fault = GCVM_CONTEXT1_CNTL__RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		GCVM_CONTEXT1_CNTL__DUMMY_PAGE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		GCVM_CONTEXT1_CNTL__PDE0_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		GCVM_CONTEXT1_CNTL__VALID_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		GCVM_CONTEXT1_CNTL__READ_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		GCVM_CONTEXT1_CNTL__WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		GCVM_CONTEXT1_CNTL__EXECUTE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK;

}



int gfxhub_v2_1_get_xgmi_info(struct amdgpu_device *adev)

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

+8 −0
Original line number Diff line number Diff line
@@ -381,6 +381,14 @@ void mmhub_v2_0_init(struct amdgpu_device *adev) 
		mmMMVM_INVALIDATE_ENG0_REQ;

	hub->eng_addr_distance = mmMMVM_INVALIDATE_ENG1_ADDR_RANGE_LO32 -

		mmMMVM_INVALIDATE_ENG0_ADDR_RANGE_LO32;



	hub->vm_cntx_cntl_vm_fault = MMVM_CONTEXT1_CNTL__RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		MMVM_CONTEXT1_CNTL__DUMMY_PAGE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		MMVM_CONTEXT1_CNTL__PDE0_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		MMVM_CONTEXT1_CNTL__VALID_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		MMVM_CONTEXT1_CNTL__READ_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		MMVM_CONTEXT1_CNTL__WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		MMVM_CONTEXT1_CNTL__EXECUTE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK;

}



static void mmhub_v2_0_update_medium_grain_clock_gating(struct amdgpu_device *adev,