Commit 5c0541e1 authored by Zi Yan's avatar Zi Yan Committed by Andrew Morton
Browse files

mm: introduce cpu_icache_is_aliasing() across all architectures 

In commit eacd0e95 ("ARC: [mm] Lazy D-cache flush (non aliasing
VIPT)"), arc adds the need to flush dcache to make icache see the code
page change.  This also requires special handling for
clear_user_(high)page().  Introduce cpu_icache_is_aliasing() to make MM
code query special clear_user_(high)page() easier.  This will be used by
the following commit.

Link: https://lkml.kernel.org/r/20241209182326.2955963-1-ziy@nvidia.com


Fixes: 5708d96d ("mm: avoid zeroing user movable page twice with init_on_alloc=1")
Signed-off-by: default avatarZi Yan <ziy@nvidia.com>
Suggested-by: default avatarMathieu Desnoyers <mathieu.desnoyers@efficios.com>
Reviewed-by: default avatarMathieu Desnoyers <mathieu.desnoyers@efficios.com>
Acked-by: default avatarVlastimil Babka <vbabka@suse.cz>
Cc: Alexander Potapenko <glider@google.com>
Cc: David Hildenbrand <david@redhat.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: John Hubbard <jhubbard@nvidia.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Kefeng Wang <wangkefeng.wang@huawei.com>
Cc: Matthew Wilcox <willy@infradead.org>
Cc: Miaohe Lin <linmiaohe@huawei.com>
Cc: Ryan Roberts <ryan.roberts@arm.com>
Cc: Vineet Gupta <vgupta@kernel.org>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
parent 31c56299

arch/arc/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
config ARC

	def_bool y

	select ARC_TIMERS

	select ARCH_HAS_CPU_CACHE_ALIASING

	select ARCH_HAS_CACHE_LINE_SIZE

	select ARCH_HAS_DEBUG_VM_PGTABLE

	select ARCH_HAS_DMA_PREP_COHERENT

arch/arc/include/asm/cachetype.h

0 → 100644
+8 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

#ifndef __ASM_ARC_CACHETYPE_H

#define __ASM_ARC_CACHETYPE_H



#define cpu_dcache_is_aliasing()	false

#define cpu_icache_is_aliasing()	true



#endif

include/linux/cacheinfo.h

+6 −0
Original line number Diff line number Diff line
@@ -155,8 +155,14 @@ static inline int get_cpu_cacheinfo_id(int cpu, int level) 


#ifndef CONFIG_ARCH_HAS_CPU_CACHE_ALIASING

#define cpu_dcache_is_aliasing()	false

#define cpu_icache_is_aliasing()	cpu_dcache_is_aliasing()

#else

#include <asm/cachetype.h>



#ifndef cpu_icache_is_aliasing

#define cpu_icache_is_aliasing()	cpu_dcache_is_aliasing()

#endif



#endif



#endif /* _LINUX_CACHEINFO_H */