Commit 5c05bcf6 authored by Timur Kristóf's avatar Timur Kristóf Committed by Alex Deucher
Browse files

drm/amd/pm: Disable MCLK switching on SI at high pixel clocks 



On various SI GPUs, a flickering can be observed near the bottom
edge of the screen when using a single 4K 60Hz monitor over DP.
Disabling MCLK switching works around this problem.

Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarTimur Kristóf <timur.kristof@gmail.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9858ea4c

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

+5 −0
Original line number Diff line number Diff line
@@ -3500,6 +3500,11 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev, 
	 * for these GPUs to calculate bandwidth requirements.

	 */

	if (high_pixelclock_count) {

		/* Work around flickering lines at the bottom edge

		 * of the screen when using a single 4K 60Hz monitor.

		 */

		disable_mclk_switching = true;



		/* On Oland, we observe some flickering when two 4K 60Hz

		 * displays are connected, possibly because voltage is too low.

		 * Raise the voltage by requiring a higher SCLK.