Commit 5c24ba20 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm 

Pull kvm fixes from Paolo Bonzini:
 "x86 guest:

   - Avoid false positive for check that only matters on AMD processors

  x86:

   - Give a hint when Win2016 might fail to boot due to XSAVES &&
     !XSAVEC configuration

   - Do not allow creating an in-kernel PIT unless an IOAPIC already
     exists

  RISC-V:

   - Allow ISA extensions that were enabled for bare metal in 6.8 (Zbc,
     scalar and vector crypto, Zfh[min], Zihintntl, Zvfh[min], Zfa)

  S390:

   - fix CC for successful PQAP instruction

   - fix a race when creating a shadow page"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  x86/coco: Define cc_vendor without CONFIG_ARCH_HAS_CC_PLATFORM
  x86/kvm: Fix SEV check in sev_map_percpu_data()
  KVM: x86: Give a hint when Win2016 might fail to boot due to XSAVES erratum
  KVM: x86: Check irqchip mode before create PIT
  KVM: riscv: selftests: Add Zfa extension to get-reg-list test
  RISC-V: KVM: Allow Zfa extension for Guest/VM
  KVM: riscv: selftests: Add Zvfh[min] extensions to get-reg-list test
  RISC-V: KVM: Allow Zvfh[min] extensions for Guest/VM
  KVM: riscv: selftests: Add Zihintntl extension to get-reg-list test
  RISC-V: KVM: Allow Zihintntl extension for Guest/VM
  KVM: riscv: selftests: Add Zfh[min] extensions to get-reg-list test
  RISC-V: KVM: Allow Zfh[min] extensions for Guest/VM
  KVM: riscv: selftests: Add vector crypto extensions to get-reg-list test
  RISC-V: KVM: Allow vector crypto extensions for Guest/VM
  KVM: riscv: selftests: Add scaler crypto extensions to get-reg-list test
  RISC-V: KVM: Allow scalar crypto extensions for Guest/VM
  KVM: riscv: selftests: Add Zbc extension to get-reg-list test
  RISC-V: KVM: Allow Zbc extension for Guest/VM
  KVM: s390: fix cc for successful PQAP
  KVM: s390: vsie: fix race during shadow creation
parents c8d80f83 e4596477

arch/riscv/include/uapi/asm/kvm.h

+27 −0
Original line number Diff line number Diff line
@@ -139,6 +139,33 @@ enum KVM_RISCV_ISA_EXT_ID { 
	KVM_RISCV_ISA_EXT_ZIHPM,

	KVM_RISCV_ISA_EXT_SMSTATEEN,

	KVM_RISCV_ISA_EXT_ZICOND,

	KVM_RISCV_ISA_EXT_ZBC,

	KVM_RISCV_ISA_EXT_ZBKB,

	KVM_RISCV_ISA_EXT_ZBKC,

	KVM_RISCV_ISA_EXT_ZBKX,

	KVM_RISCV_ISA_EXT_ZKND,

	KVM_RISCV_ISA_EXT_ZKNE,

	KVM_RISCV_ISA_EXT_ZKNH,

	KVM_RISCV_ISA_EXT_ZKR,

	KVM_RISCV_ISA_EXT_ZKSED,

	KVM_RISCV_ISA_EXT_ZKSH,

	KVM_RISCV_ISA_EXT_ZKT,

	KVM_RISCV_ISA_EXT_ZVBB,

	KVM_RISCV_ISA_EXT_ZVBC,

	KVM_RISCV_ISA_EXT_ZVKB,

	KVM_RISCV_ISA_EXT_ZVKG,

	KVM_RISCV_ISA_EXT_ZVKNED,

	KVM_RISCV_ISA_EXT_ZVKNHA,

	KVM_RISCV_ISA_EXT_ZVKNHB,

	KVM_RISCV_ISA_EXT_ZVKSED,

	KVM_RISCV_ISA_EXT_ZVKSH,

	KVM_RISCV_ISA_EXT_ZVKT,

	KVM_RISCV_ISA_EXT_ZFH,

	KVM_RISCV_ISA_EXT_ZFHMIN,

	KVM_RISCV_ISA_EXT_ZIHINTNTL,

	KVM_RISCV_ISA_EXT_ZVFH,

	KVM_RISCV_ISA_EXT_ZVFHMIN,

	KVM_RISCV_ISA_EXT_ZFA,

	KVM_RISCV_ISA_EXT_MAX,

};

arch/riscv/kvm/vcpu_onereg.c

+54 −0
Original line number Diff line number Diff line
@@ -42,15 +42,42 @@ static const unsigned long kvm_isa_ext_arr[] = { 
	KVM_ISA_EXT_ARR(SVPBMT),

	KVM_ISA_EXT_ARR(ZBA),

	KVM_ISA_EXT_ARR(ZBB),

	KVM_ISA_EXT_ARR(ZBC),

	KVM_ISA_EXT_ARR(ZBKB),

	KVM_ISA_EXT_ARR(ZBKC),

	KVM_ISA_EXT_ARR(ZBKX),

	KVM_ISA_EXT_ARR(ZBS),

	KVM_ISA_EXT_ARR(ZFA),

	KVM_ISA_EXT_ARR(ZFH),

	KVM_ISA_EXT_ARR(ZFHMIN),

	KVM_ISA_EXT_ARR(ZICBOM),

	KVM_ISA_EXT_ARR(ZICBOZ),

	KVM_ISA_EXT_ARR(ZICNTR),

	KVM_ISA_EXT_ARR(ZICOND),

	KVM_ISA_EXT_ARR(ZICSR),

	KVM_ISA_EXT_ARR(ZIFENCEI),

	KVM_ISA_EXT_ARR(ZIHINTNTL),

	KVM_ISA_EXT_ARR(ZIHINTPAUSE),

	KVM_ISA_EXT_ARR(ZIHPM),

	KVM_ISA_EXT_ARR(ZKND),

	KVM_ISA_EXT_ARR(ZKNE),

	KVM_ISA_EXT_ARR(ZKNH),

	KVM_ISA_EXT_ARR(ZKR),

	KVM_ISA_EXT_ARR(ZKSED),

	KVM_ISA_EXT_ARR(ZKSH),

	KVM_ISA_EXT_ARR(ZKT),

	KVM_ISA_EXT_ARR(ZVBB),

	KVM_ISA_EXT_ARR(ZVBC),

	KVM_ISA_EXT_ARR(ZVFH),

	KVM_ISA_EXT_ARR(ZVFHMIN),

	KVM_ISA_EXT_ARR(ZVKB),

	KVM_ISA_EXT_ARR(ZVKG),

	KVM_ISA_EXT_ARR(ZVKNED),

	KVM_ISA_EXT_ARR(ZVKNHA),

	KVM_ISA_EXT_ARR(ZVKNHB),

	KVM_ISA_EXT_ARR(ZVKSED),

	KVM_ISA_EXT_ARR(ZVKSH),

	KVM_ISA_EXT_ARR(ZVKT),

};



static unsigned long kvm_riscv_vcpu_base2isa_ext(unsigned long base_ext)
@@ -92,13 +119,40 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) 
	case KVM_RISCV_ISA_EXT_SVNAPOT:

	case KVM_RISCV_ISA_EXT_ZBA:

	case KVM_RISCV_ISA_EXT_ZBB:

	case KVM_RISCV_ISA_EXT_ZBC:

	case KVM_RISCV_ISA_EXT_ZBKB:

	case KVM_RISCV_ISA_EXT_ZBKC:

	case KVM_RISCV_ISA_EXT_ZBKX:

	case KVM_RISCV_ISA_EXT_ZBS:

	case KVM_RISCV_ISA_EXT_ZFA:

	case KVM_RISCV_ISA_EXT_ZFH:

	case KVM_RISCV_ISA_EXT_ZFHMIN:

	case KVM_RISCV_ISA_EXT_ZICNTR:

	case KVM_RISCV_ISA_EXT_ZICOND:

	case KVM_RISCV_ISA_EXT_ZICSR:

	case KVM_RISCV_ISA_EXT_ZIFENCEI:

	case KVM_RISCV_ISA_EXT_ZIHINTNTL:

	case KVM_RISCV_ISA_EXT_ZIHINTPAUSE:

	case KVM_RISCV_ISA_EXT_ZIHPM:

	case KVM_RISCV_ISA_EXT_ZKND:

	case KVM_RISCV_ISA_EXT_ZKNE:

	case KVM_RISCV_ISA_EXT_ZKNH:

	case KVM_RISCV_ISA_EXT_ZKR:

	case KVM_RISCV_ISA_EXT_ZKSED:

	case KVM_RISCV_ISA_EXT_ZKSH:

	case KVM_RISCV_ISA_EXT_ZKT:

	case KVM_RISCV_ISA_EXT_ZVBB:

	case KVM_RISCV_ISA_EXT_ZVBC:

	case KVM_RISCV_ISA_EXT_ZVFH:

	case KVM_RISCV_ISA_EXT_ZVFHMIN:

	case KVM_RISCV_ISA_EXT_ZVKB:

	case KVM_RISCV_ISA_EXT_ZVKG:

	case KVM_RISCV_ISA_EXT_ZVKNED:

	case KVM_RISCV_ISA_EXT_ZVKNHA:

	case KVM_RISCV_ISA_EXT_ZVKNHB:

	case KVM_RISCV_ISA_EXT_ZVKSED:

	case KVM_RISCV_ISA_EXT_ZVKSH:

	case KVM_RISCV_ISA_EXT_ZVKT:

		return false;

	/* Extensions which can be disabled using Smstateen */

	case KVM_RISCV_ISA_EXT_SSAIA:

arch/s390/kvm/priv.c

+6 −2
Original line number Diff line number Diff line
@@ -676,8 +676,12 @@ static int handle_pqap(struct kvm_vcpu *vcpu) 
	if (vcpu->kvm->arch.crypto.pqap_hook) {

		pqap_hook = *vcpu->kvm->arch.crypto.pqap_hook;

		ret = pqap_hook(vcpu);

		if (!ret && vcpu->run->s.regs.gprs[1] & 0x00ff0000)

		if (!ret) {

			if (vcpu->run->s.regs.gprs[1] & 0x00ff0000)

				kvm_s390_set_psw_cc(vcpu, 3);

			else

				kvm_s390_set_psw_cc(vcpu, 0);

		}

		up_read(&vcpu->kvm->arch.crypto.pqap_hook_rwsem);

		return ret;

	}

arch/s390/kvm/vsie.c

+0 −1
Original line number Diff line number Diff line
@@ -1235,7 +1235,6 @@ static int acquire_gmap_shadow(struct kvm_vcpu *vcpu, 
	gmap = gmap_shadow(vcpu->arch.gmap, asce, edat);

	if (IS_ERR(gmap))

		return PTR_ERR(gmap);

	gmap->private = vcpu->kvm;

	vcpu->kvm->stat.gmap_shadow_create++;

	WRITE_ONCE(vsie_page->gmap, gmap);

	return 0;

arch/s390/mm/gmap.c

+1 −0
Original line number Diff line number Diff line
@@ -1691,6 +1691,7 @@ struct gmap *gmap_shadow(struct gmap *parent, unsigned long asce, 
		return ERR_PTR(-ENOMEM);

	new->mm = parent->mm;

	new->parent = gmap_get(parent);

	new->private = parent->private;

	new->orig_asce = asce;

	new->edat_level = edat_level;

	new->initialized = false;