Commit 5d5f2919 authored by Lars Povlsen's avatar Lars Povlsen Committed by Linus Walleij
Browse files

pinctrl: microchip-sgpio: Fix wrong register offset for IRQ trigger 



This patch fixes using a wrong register offset when configuring an IRQ
trigger type.

Fixes: be2dc859 ("pinctrl: pinctrl-microchip-sgpio: Add irq support (for sparx5)")
Reported-by: default avatarGustavo A. R. Silva <gustavoars@kernel.org>
Signed-off-by: default avatarLars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: default avatarGustavo A. R. Silva <gustavoars@kernel.org>
Link: https://lore.kernel.org/r/20210203123825.611576-1-lars.povlsen@microchip.com


Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent a38fd874

drivers/pinctrl/pinctrl-microchip-sgpio.c

+1 −1
Original line number Diff line number Diff line
@@ -572,7 +572,7 @@ static void microchip_sgpio_irq_settype(struct irq_data *data, 
	/* Type value spread over 2 registers sets: low, high bit */

	sgpio_clrsetbits(bank->priv, REG_INT_TRIGGER, addr.bit,

			 BIT(addr.port), (!!(type & 0x1)) << addr.port);

	sgpio_clrsetbits(bank->priv, REG_INT_TRIGGER + SGPIO_MAX_BITS, addr.bit,

	sgpio_clrsetbits(bank->priv, REG_INT_TRIGGER, SGPIO_MAX_BITS + addr.bit,

			 BIT(addr.port), (!!(type & 0x2)) << addr.port);



	if (type == SGPIO_INT_TRG_LEVEL)