Unverified Commit 5dadda5e authored by Clément Léger's avatar Clément Léger Committed by Palmer Dabbelt
Browse files

riscv: hwprobe: export Zvfh[min] ISA extensions 

Export Zvfh[min] ISA extension[1] through hwprobe.

Link: https://drive.google.com/file/d/1_Yt60HGAf1r1hx7JnsIptw0sqkBd9BQ8/view

 [1]
Signed-off-by: default avatarClément Léger <cleger@rivosinc.com>
Reviewed-by: default avatarEvan Green <evan@rivosinc.com>
Link: https://lore.kernel.org/r/20231114141256.126749-17-cleger@rivosinc.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent f4961b78

Documentation/arch/riscv/hwprobe.rst

+8 −0
Original line number Diff line number Diff line
@@ -149,6 +149,14 @@ The following keys are defined: 
  * :c:macro:`RISCV_HWPROBE_EXT_ZIHINTNTL`: The Zihintntl extension version 1.0

       is supported as defined in the RISC-V ISA manual.



  * :c:macro:`RISCV_HWPROBE_EXT_ZVFH`: The Zvfh extension is supported as

       defined in the RISC-V Vector manual starting from commit e2ccd0548d6c

       ("Remove draft warnings from Zvfh[min]").



  * :c:macro:`RISCV_HWPROBE_EXT_ZVFHMIN`: The Zvfhmin extension is supported as

       defined in the RISC-V Vector manual starting from commit e2ccd0548d6c

       ("Remove draft warnings from Zvfh[min]").



* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance

  information about the selected set of processors.

arch/riscv/include/uapi/asm/hwprobe.h

+2 −0
Original line number Diff line number Diff line
@@ -53,6 +53,8 @@ struct riscv_hwprobe { 
#define		RISCV_HWPROBE_EXT_ZFH		(1 << 27)

#define		RISCV_HWPROBE_EXT_ZFHMIN	(1 << 28)

#define		RISCV_HWPROBE_EXT_ZIHINTNTL	(1 << 29)

#define		RISCV_HWPROBE_EXT_ZVFH		(1 << 30)

#define		RISCV_HWPROBE_EXT_ZVFHMIN	(1 << 31)

#define RISCV_HWPROBE_KEY_CPUPERF_0	5

#define		RISCV_HWPROBE_MISALIGNED_UNKNOWN	(0 << 0)

#define		RISCV_HWPROBE_MISALIGNED_EMULATED	(1 << 0)

arch/riscv/kernel/sys_riscv.c

+2 −0
Original line number Diff line number Diff line
@@ -186,6 +186,8 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, 
			EXT_KEY(ZVKSED);

			EXT_KEY(ZVKSH);

			EXT_KEY(ZVKT);

			EXT_KEY(ZVFH);

			EXT_KEY(ZVFHMIN);

		}



		if (has_fpu()) {