Commit 5dc60445 authored by Frank Li's avatar Frank Li Committed by Vinod Koul
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dmaengine: fsl-edma: involve help macro fsl_edma_set(get)_tcd() 



Using help macro fsl_edma_set(get)_tcd() and edma_cp_tcd_to_reg() to handle
difference field size. This is not function change and prepare for 64bit
tcd in imx95.

Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20231221153528.1588049-2-Frank.Li@nxp.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent d2363272

drivers/dma/fsl-edma-common.c

+31 −30
Original line number Diff line number Diff line
@@ -358,10 +358,10 @@ static size_t fsl_edma_desc_residue(struct fsl_edma_chan *fsl_chan, 


	/* calculate the total size in this desc */

	for (len = i = 0; i < fsl_chan->edesc->n_tcds; i++) {

		nbytes = le32_to_cpu(edesc->tcd[i].vtcd->nbytes);

		nbytes = fsl_edma_get_tcd_to_cpu(fsl_chan, edesc->tcd[i].vtcd, nbytes);

		if (nbytes & (EDMA_V3_TCD_NBYTES_DMLOE | EDMA_V3_TCD_NBYTES_SMLOE))

			nbytes = EDMA_V3_TCD_NBYTES_MLOFF_NBYTES(nbytes);

		len += nbytes * le16_to_cpu(edesc->tcd[i].vtcd->biter);

		len += nbytes * fsl_edma_get_tcd_to_cpu(fsl_chan, edesc->tcd[i].vtcd, biter);

	}



	if (!in_progress)
@@ -374,16 +374,16 @@ static size_t fsl_edma_desc_residue(struct fsl_edma_chan *fsl_chan, 


	/* figure out the finished and calculate the residue */

	for (i = 0; i < fsl_chan->edesc->n_tcds; i++) {

		nbytes = le32_to_cpu(edesc->tcd[i].vtcd->nbytes);

		nbytes = fsl_edma_get_tcd_to_cpu(fsl_chan, edesc->tcd[i].vtcd, nbytes);

		if (nbytes & (EDMA_V3_TCD_NBYTES_DMLOE | EDMA_V3_TCD_NBYTES_SMLOE))

			nbytes = EDMA_V3_TCD_NBYTES_MLOFF_NBYTES(nbytes);



		size = nbytes * le16_to_cpu(edesc->tcd[i].vtcd->biter);

		size = nbytes * fsl_edma_get_tcd_to_cpu(fsl_chan, edesc->tcd[i].vtcd, biter);



		if (dir == DMA_MEM_TO_DEV)

			dma_addr = le32_to_cpu(edesc->tcd[i].vtcd->saddr);

			dma_addr = fsl_edma_get_tcd_to_cpu(fsl_chan, edesc->tcd[i].vtcd, saddr);

		else

			dma_addr = le32_to_cpu(edesc->tcd[i].vtcd->daddr);

			dma_addr = fsl_edma_get_tcd_to_cpu(fsl_chan, edesc->tcd[i].vtcd, daddr);



		len -= size;

		if (cur_addr >= dma_addr && cur_addr < dma_addr + size) {
@@ -439,26 +439,26 @@ static void fsl_edma_set_tcd_regs(struct fsl_edma_chan *fsl_chan, 
	 */

	edma_write_tcdreg(fsl_chan, 0, csr);



	edma_write_tcdreg(fsl_chan, tcd->saddr, saddr);

	edma_write_tcdreg(fsl_chan, tcd->daddr, daddr);

	edma_cp_tcd_to_reg(fsl_chan, tcd, saddr);

	edma_cp_tcd_to_reg(fsl_chan, tcd, daddr);



	edma_write_tcdreg(fsl_chan, tcd->attr, attr);

	edma_write_tcdreg(fsl_chan, tcd->soff, soff);

	edma_cp_tcd_to_reg(fsl_chan, tcd, attr);

	edma_cp_tcd_to_reg(fsl_chan, tcd, soff);



	edma_write_tcdreg(fsl_chan, tcd->nbytes, nbytes);

	edma_write_tcdreg(fsl_chan, tcd->slast, slast);

	edma_cp_tcd_to_reg(fsl_chan, tcd, nbytes);

	edma_cp_tcd_to_reg(fsl_chan, tcd, slast);



	edma_write_tcdreg(fsl_chan, tcd->citer, citer);

	edma_write_tcdreg(fsl_chan, tcd->biter, biter);

	edma_write_tcdreg(fsl_chan, tcd->doff, doff);

	edma_cp_tcd_to_reg(fsl_chan, tcd, citer);

	edma_cp_tcd_to_reg(fsl_chan, tcd, biter);

	edma_cp_tcd_to_reg(fsl_chan, tcd, doff);



	edma_write_tcdreg(fsl_chan, tcd->dlast_sga, dlast_sga);

	edma_cp_tcd_to_reg(fsl_chan, tcd, dlast_sga);



	csr = le16_to_cpu(tcd->csr);

	csr = fsl_edma_get_tcd_to_cpu(fsl_chan, tcd, csr);



	if (fsl_chan->is_sw) {

		csr |= EDMA_TCD_CSR_START;

		tcd->csr = cpu_to_le16(csr);

		fsl_edma_set_tcd_to_le(fsl_chan, tcd, csr, csr);

	}



	/*
@@ -473,7 +473,7 @@ static void fsl_edma_set_tcd_regs(struct fsl_edma_chan *fsl_chan, 
		edma_writel_chreg(fsl_chan, edma_readl_chreg(fsl_chan, ch_csr), ch_csr);





	edma_write_tcdreg(fsl_chan, tcd->csr, csr);

	edma_cp_tcd_to_reg(fsl_chan, tcd, csr);

}



static inline
@@ -493,12 +493,12 @@ void fsl_edma_fill_tcd(struct fsl_edma_chan *fsl_chan, 
	 * So we put the value in little endian in memory, waiting

	 * for fsl_edma_set_tcd_regs doing the swap.

	 */

	tcd->saddr = cpu_to_le32(src);

	tcd->daddr = cpu_to_le32(dst);

	fsl_edma_set_tcd_to_le(fsl_chan, tcd, src, saddr);

	fsl_edma_set_tcd_to_le(fsl_chan, tcd, dst, daddr);



	tcd->attr = cpu_to_le16(attr);

	fsl_edma_set_tcd_to_le(fsl_chan, tcd, attr, attr);



	tcd->soff = cpu_to_le16(soff);

	fsl_edma_set_tcd_to_le(fsl_chan, tcd, soff, soff);



	if (fsl_chan->is_multi_fifo) {

		/* set mloff to support multiple fifo */
@@ -515,15 +515,16 @@ void fsl_edma_fill_tcd(struct fsl_edma_chan *fsl_chan, 
		}

	}



	tcd->nbytes = cpu_to_le32(nbytes);

	tcd->slast = cpu_to_le32(slast);

	fsl_edma_set_tcd_to_le(fsl_chan, tcd, nbytes, nbytes);

	fsl_edma_set_tcd_to_le(fsl_chan, tcd, slast, slast);



	tcd->citer = cpu_to_le16(EDMA_TCD_CITER_CITER(citer));

	tcd->doff = cpu_to_le16(doff);

	fsl_edma_set_tcd_to_le(fsl_chan, tcd, EDMA_TCD_CITER_CITER(citer), citer);

	fsl_edma_set_tcd_to_le(fsl_chan, tcd, doff, doff);



	tcd->dlast_sga = cpu_to_le32(dlast_sga);

	fsl_edma_set_tcd_to_le(fsl_chan, tcd, dlast_sga, dlast_sga);



	fsl_edma_set_tcd_to_le(fsl_chan, tcd, EDMA_TCD_BITER_BITER(biter), biter);



	tcd->biter = cpu_to_le16(EDMA_TCD_BITER_BITER(biter));

	if (major_int)

		csr |= EDMA_TCD_CSR_INT_MAJOR;
@@ -539,7 +540,7 @@ void fsl_edma_fill_tcd(struct fsl_edma_chan *fsl_chan, 
	if (fsl_chan->is_sw)

		csr |= EDMA_TCD_CSR_START;



	tcd->csr = cpu_to_le16(csr);

	fsl_edma_set_tcd_to_le(fsl_chan, tcd, csr, csr);

}



static struct fsl_edma_desc *fsl_edma_alloc_desc(struct fsl_edma_chan *fsl_chan,

drivers/dma/fsl-edma-common.h

+23 −0
Original line number Diff line number Diff line
@@ -238,6 +238,9 @@ struct fsl_edma_engine { 
	edma_writel(chan->edma, (u32 __force)val, &chan->tcd->__name) :	\

	edma_writew(chan->edma, (u16 __force)val, &chan->tcd->__name))



#define edma_cp_tcd_to_reg(chan, __tcd, __name)			\

	edma_write_tcdreg(chan, __tcd->__name, __name)



#define edma_readl_chreg(chan, __name)				\

	edma_readl(chan->edma,					\

		   (void __iomem *)&(container_of(chan->tcd, struct fsl_edma3_ch_reg, tcd)->__name))
@@ -246,6 +249,26 @@ struct fsl_edma_engine { 
	edma_writel(chan->edma, val,				\

		   (void __iomem *)&(container_of(chan->tcd, struct fsl_edma3_ch_reg, tcd)->__name))



#define fsl_edma_get_tcd(_chan, _tcd, _field) ((_tcd)->_field)



#define fsl_edma_le_to_cpu(x)					\

(sizeof(x) == sizeof(u32) ? le32_to_cpu((__force __le32)(x)) : le16_to_cpu((__force __le16)(x)))



#define fsl_edma_get_tcd_to_cpu(_chan, _tcd, _field)		\

fsl_edma_le_to_cpu(fsl_edma_get_tcd(_chan, _tcd, _field))



#define fsl_edma_set_tcd_to_le(_fsl_chan, _tcd, _val, _field)			\

do {										\

	switch (sizeof((_tcd)->_field)) {					\

	case sizeof(u32):							\

		*(__force __le32 *)(&((_tcd)->_field)) = cpu_to_le32(_val);	\

		break;								\

	case sizeof(u16):							\

		*(__force __le16 *)(&((_tcd)->_field)) = cpu_to_le16(_val);	\

		break;								\

	}									\

} while (0)



/*

 * R/W functions for big- or little-endian registers:

 * The eDMA controller's endian is independent of the CPU core's endian.