Commit 5de8ce0f authored by Yang Wang's avatar Yang Wang Committed by Alex Deucher
Browse files

drm/amd/pm: adjust the visibility of pp_table sysfs node 



v1:
- make pp_table invisible on VF mode (only valid on BM)
- make pp_table invisible on Mi* chips (Not supported)
- make pp_table invisible if scpm feature is enabled.

v2:
move pp_table invisible code logic into amdgpu_dpm_get_pp_table() function.

v3:
add table buffer pointer check both on powerplay & swsmu.

Signed-off-by: default avatarYang Wang <kevinyang.wang@amd.com>
Reviewed-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 66a50fa4

drivers/gpu/drm/amd/pm/amdgpu_dpm.c

+9 −3
Original line number Diff line number Diff line
@@ -1187,8 +1187,11 @@ int amdgpu_dpm_get_pp_table(struct amdgpu_device *adev, char **table) 
	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;

	int ret = 0;



	if (!pp_funcs->get_pp_table)

		return 0;

	if (!table)

		return -EINVAL;



	if (amdgpu_sriov_vf(adev) || !pp_funcs->get_pp_table || adev->scpm_enabled)

		return -EOPNOTSUPP;



	mutex_lock(&adev->pm.mutex);

	ret = pp_funcs->get_pp_table(adev->powerplay.pp_handle,
@@ -1715,7 +1718,10 @@ int amdgpu_dpm_set_pp_table(struct amdgpu_device *adev, 
	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;

	int ret = 0;



	if (!pp_funcs->set_pp_table)

	if (!buf || !size)

		return -EINVAL;



	if (amdgpu_sriov_vf(adev) || !pp_funcs->set_pp_table || adev->scpm_enabled)

		return -EOPNOTSUPP;



	mutex_lock(&adev->pm.mutex);

drivers/gpu/drm/amd/pm/amdgpu_pm.c

+10 −1
Original line number Diff line number Diff line
@@ -2506,7 +2506,7 @@ static struct amdgpu_device_attr amdgpu_device_attrs[] = { 
	AMDGPU_DEVICE_ATTR_RO(pp_num_states,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),

	AMDGPU_DEVICE_ATTR_RO(pp_cur_state,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),

	AMDGPU_DEVICE_ATTR_RW(pp_force_state,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),

	AMDGPU_DEVICE_ATTR_RW(pp_table,					ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),

	AMDGPU_DEVICE_ATTR_RW(pp_table,					ATTR_FLAG_BASIC),

	AMDGPU_DEVICE_ATTR_RW(pp_dpm_sclk,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF,

			      .attr_update = pp_dpm_clk_default_attr_update),

	AMDGPU_DEVICE_ATTR_RW(pp_dpm_mclk,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF,
@@ -2638,6 +2638,15 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_ 
		if (amdgpu_dpm_get_apu_thermal_limit(adev, &limit) ==

		    -EOPNOTSUPP)

			*states = ATTR_STATE_UNSUPPORTED;

	} else if (DEVICE_ATTR_IS(pp_table)) {

		int ret;

		char *tmp = NULL;



		ret = amdgpu_dpm_get_pp_table(adev, &tmp);

		if (ret == -EOPNOTSUPP || !tmp)

			*states = ATTR_STATE_UNSUPPORTED;

		else

			*states = ATTR_STATE_SUPPORTED;

	}



	switch (gc_ver) {

drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c

+4 −1
Original line number Diff line number Diff line
@@ -631,9 +631,12 @@ static int pp_dpm_get_pp_table(void *handle, char **table) 
{

	struct pp_hwmgr *hwmgr = handle;



	if (!hwmgr || !hwmgr->pm_en || !hwmgr->soft_pp_table)

	if (!hwmgr || !hwmgr->pm_en || !table)

		return -EINVAL;



	if (!hwmgr->soft_pp_table)

		return -EOPNOTSUPP;



	*table = (char *)hwmgr->soft_pp_table;

	return hwmgr->soft_pp_table_size;

}

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

+1 −1
Original line number Diff line number Diff line
@@ -634,7 +634,7 @@ static int smu_sys_get_pp_table(void *handle, 
		return -EOPNOTSUPP;



	if (!smu_table->power_play_table && !smu_table->hardcode_pptable)

		return -EINVAL;

		return -EOPNOTSUPP;



	if (smu_table->hardcode_pptable)

		*table = smu_table->hardcode_pptable;