Commit 5df96d14 authored Dec 05, 2025 by Brian Masney Committed by Claudiu Beznea Jan 10, 2026

clk: microchip: core: correct return value on *_get_parent()



roclk_get_parent() and sclk_get_parent() has the possibility of
returning -EINVAL, however the framework expects this call to always
succeed since the return value is unsigned.

If there is no parent map defined, then the current value programmed in
the hardware is used. Let's use that same value in the case where
-EINVAL is currently returned.

This index is only used by clk_core_get_parent_by_index(), and it
validates that it doesn't overflow the number of available parents.

Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: https://lore.kernel.org/r/202512050233.R9hAWsJN-lkp@intel.com/


Signed-off-by: Brian Masney <bmasney@redhat.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Link: https://lore.kernel.org/r/20251205-clk-microchip-fixes-v3-2-a02190705e47@redhat.com


Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>

parent d93faac6

drivers/clk/microchip/clk-core.c

+12 −13

Original line number	Diff line number	Diff line
		@@ -283,14 +283,13 @@ static u8 roclk_get_parent(struct clk_hw *hw)

		v = (readl(refo->ctrl_reg) >> REFO_SEL_SHIFT) & REFO_SEL_MASK;

		if (!refo->parent_map)
		return v;

		if (refo->parent_map) {
		for (i = 0; i < clk_hw_get_num_parents(hw); i++)
		if (refo->parent_map[i] == v)
		return i;
		}

		return -EINVAL;
		return v;
		}

		static unsigned long roclk_calc_rate(unsigned long parent_rate,
		@@ -817,13 +816,13 @@ static u8 sclk_get_parent(struct clk_hw *hw)

		v = (readl(sclk->mux_reg) >> OSC_CUR_SHIFT) & OSC_CUR_MASK;

		if (!sclk->parent_map)
		return v;

		if (sclk->parent_map) {
		for (i = 0; i < clk_hw_get_num_parents(hw); i++)
		if (sclk->parent_map[i] == v)
		return i;
		return -EINVAL;
		}

		return v;
		}

		static int sclk_set_parent(struct clk_hw *hw, u8 index)