Commit 5ecd5a82 authored by John Madieu's avatar John Madieu Committed by Geert Uytterhoeven
Browse files

arm64: dts: renesas: rzg3e-smarc-som: Add RAA215300 pmic support 



Enable RAA215300 PMIC and built-in RTC support on the RZ/G3E SoM module.
Also add related clock and interrupt signals.

Signed-off-by: default avatarJohn Madieu <john.madieu.xa@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250329121258.172099-3-john.madieu.xa@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent f7a98e25

arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi

+25 −0
Original line number Diff line number Diff line
@@ -46,6 +46,13 @@ reg_3p3v: regulator-3p3v { 
		regulator-boot-on;

		regulator-always-on;

	};



	/* 32.768kHz crystal */

	x3: x3-clock {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <32768>;

	};

};



&audio_extal_clk {
@@ -57,6 +64,19 @@ &i2c2 { 
	pinctrl-names = "default";

	clock-frequency = <1000000>;

	status = "okay";



	raa215300: pmic@12 {

		compatible = "renesas,raa215300";

		reg = <0x12>, <0x6f>;

		reg-names = "main", "rtc";

		clocks = <&x3>;

		clock-names = "xin";



		pinctrl-0 = <&rtc_irq_pin>;

		pinctrl-names = "default";



		interrupts-extended = <&pinctrl RZG3E_GPIO(S, 1) IRQ_TYPE_EDGE_FALLING>;

	};

};



&pinctrl {
@@ -65,6 +85,11 @@ i2c2_pins: i2c { 
			 <RZG3E_PORT_PINMUX(3, 5, 1)>; /* SDA2 */

	};



	rtc_irq_pin: rtc-irq {

		pins = "PS1";

		bias-pull-up;

	};



	sdhi0_emmc_pins: sd0-emmc {

		sd0-ctrl {

			pins = "SD0CLK", "SD0CMD";