Commit 5f33ebd2 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2025-07-26' of https://gitlab.freedesktop.org/drm/kernel 

Pull drm fixes (part 2) from Dave Airlie:
 "Just the follow up fixes for i915 and xe, all pretty minor.

  i915:
   - Fix DP 2.7 Gbps DP_LINK_BW value on g4x
   - Fix return value on intel_atomic_commit_fence_wait

  xe:
   - Fix build without debugfs"

* tag 'drm-fixes-2025-07-26' of https://gitlab.freedesktop.org/drm/kernel:
  drm/xe: Fix build without debugfs
  drm/i915/display: Fix dma_fence_wait_timeout() return value handling
  drm/i915/dp: Fix 2.7 Gbps DP_LINK_BW value on g4x
parents 32757967 14e8f8e7

drivers/gpu/drm/i915/display/intel_display.c

+2 −1
Original line number Diff line number Diff line
@@ -7061,7 +7061,8 @@ static void intel_atomic_commit_fence_wait(struct intel_atomic_state *intel_stat 
	struct drm_i915_private *i915 = to_i915(intel_state->base.dev);

	struct drm_plane *plane;

	struct drm_plane_state *new_plane_state;

	int ret, i;

	long ret;

	int i;



	for_each_new_plane_in_state(&intel_state->base, plane, new_plane_state, i) {

		if (new_plane_state->fence) {

drivers/gpu/drm/i915/display/intel_dp.c

+6 −0
Original line number Diff line number Diff line
@@ -1604,6 +1604,12 @@ int intel_dp_rate_select(struct intel_dp *intel_dp, int rate) 
void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,

			   u8 *link_bw, u8 *rate_select)

{

	struct intel_display *display = to_intel_display(intel_dp);



	/* FIXME g4x can't generate an exact 2.7GHz with the 96MHz non-SSC refclk */

	if (display->platform.g4x && port_clock == 268800)

		port_clock = 270000;



	/* eDP 1.4 rate select method. */

	if (intel_dp->use_rate_select) {

		*link_bw = 0;

drivers/gpu/drm/xe/xe_gt.h

+1 −1
Original line number Diff line number Diff line
@@ -24,7 +24,7 @@ 
extern struct fault_attr gt_reset_failure;

static inline bool xe_fault_inject_gt_reset(void)

{

	return should_fail(&gt_reset_failure, 1);

	return IS_ENABLED(CONFIG_DEBUG_FS) && should_fail(&gt_reset_failure, 1);

}



struct xe_gt *xe_gt_alloc(struct xe_tile *tile);