Commit 5f7cd0dc authored by Besar Wicaksono's avatar Besar Wicaksono Committed by Will Deacon
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perf: arm_cspmu: nvidia: fix sysfs path in the kernel doc 



Fix typos to the sysfs path referenced by NVIDIA
uncore pmu kernel doc.

Signed-off-by: default avatarBesar Wicaksono <bwicaksono@nvidia.com>
Link: https://lore.kernel.org/r/20241031142118.1865965-3-bwicaksono@nvidia.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent ac4c5295

Documentation/admin-guide/perf/nvidia-pmu.rst

+7 −7
Original line number Diff line number Diff line
@@ -34,7 +34,7 @@ strongly-ordered (SO) PCIE write traffic to local/remote memory. Please see 
traffic coverage.



The events and configuration options of this PMU device are described in sysfs,

see /sys/bus/event_sources/devices/nvidia_scf_pmu_<socket-id>.

see /sys/bus/event_source/devices/nvidia_scf_pmu_<socket-id>.



Example usage:
@@ -66,7 +66,7 @@ Please see :ref:`NVIDIA_Uncore_PMU_Traffic_Coverage_Section` for more info about 
the PMU traffic coverage.



The events and configuration options of this PMU device are described in sysfs,

see /sys/bus/event_sources/devices/nvidia_nvlink_c2c0_pmu_<socket-id>.

see /sys/bus/event_source/devices/nvidia_nvlink_c2c0_pmu_<socket-id>.



Example usage:
@@ -96,7 +96,7 @@ Please see :ref:`NVIDIA_Uncore_PMU_Traffic_Coverage_Section` for more info about 
the PMU traffic coverage.



The events and configuration options of this PMU device are described in sysfs,

see /sys/bus/event_sources/devices/nvidia_nvlink_c2c1_pmu_<socket-id>.

see /sys/bus/event_source/devices/nvidia_nvlink_c2c1_pmu_<socket-id>.



Example usage:
@@ -125,13 +125,13 @@ to local memory. For PCIE traffic, this PMU captures read and relaxed ordered 
for more info about the PMU traffic coverage.



The events and configuration options of this PMU device are described in sysfs,

see /sys/bus/event_sources/devices/nvidia_cnvlink_pmu_<socket-id>.

see /sys/bus/event_source/devices/nvidia_cnvlink_pmu_<socket-id>.



Each SoC socket can be connected to one or more sockets via CNVLink. The user can

use "rem_socket" bitmap parameter to select the remote socket(s) to monitor.

Each bit represents the socket number, e.g. "rem_socket=0xE" corresponds to

socket 1 to 3.

/sys/bus/event_sources/devices/nvidia_cnvlink_pmu_<socket-id>/format/rem_socket

/sys/bus/event_source/devices/nvidia_cnvlink_pmu_<socket-id>/format/rem_socket

shows the valid bits that can be set in the "rem_socket" parameter.



The PMU can not distinguish the remote traffic initiator, therefore it does not
@@ -165,12 +165,12 @@ local/remote memory. Please see :ref:`NVIDIA_Uncore_PMU_Traffic_Coverage_Section 
for more info about the PMU traffic coverage.



The events and configuration options of this PMU device are described in sysfs,

see /sys/bus/event_sources/devices/nvidia_pcie_pmu_<socket-id>.

see /sys/bus/event_source/devices/nvidia_pcie_pmu_<socket-id>.



Each SoC socket can support multiple root ports. The user can use

"root_port" bitmap parameter to select the port(s) to monitor, i.e.

"root_port=0xF" corresponds to root port 0 to 3.

/sys/bus/event_sources/devices/nvidia_pcie_pmu_<socket-id>/format/root_port

/sys/bus/event_source/devices/nvidia_pcie_pmu_<socket-id>/format/root_port

shows the valid bits that can be set in the "root_port" parameter.



Example usage: