Commit 5f847eed authored by Grzegorz Nitka's avatar Grzegorz Nitka Committed by Jakub Kicinski
Browse files

ice: Add NAC Topology device capability parser 



Add new device capability ICE_AQC_CAPS_NAC_TOPOLOGY which allows to
determine the mode of operation (1 or 2 NAC).
Define a new structure to store data from new capability and
corresponding parser code.

Co-developed-by: default avatarPrathisna Padmasanan <prathisna.padmasanan@intel.com>
Signed-off-by: default avatarPrathisna Padmasanan <prathisna.padmasanan@intel.com>
Signed-off-by: default avatarGrzegorz Nitka <grzegorz.nitka@intel.com>
Reviewed-by: default avatarPawel Kaminski <pawel.kaminski@intel.com>
Reviewed-by: default avatarMateusz Polchlopek <mateusz.polchlopek@intel.com>
Reviewed-by: default avatarPrzemek Kitszel <przemyslaw.kitszel@intel.com>
Reviewed-by: default avatarArkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Signed-off-by: default avatarKarol Kolacinski <karol.kolacinski@intel.com>
Tested-by: default avatarPucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com>
Signed-off-by: default avatarJacob Keller <jacob.e.keller@intel.com>
Link: https://lore.kernel.org/r/20240528-next-2024-05-28-ptp-refactors-v1-10-c082739bb6f6@intel.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 713dcad2

drivers/net/ethernet/intel/ice/ice_adminq_cmd.h

+1 −0
Original line number Diff line number Diff line
@@ -122,6 +122,7 @@ struct ice_aqc_list_caps_elem { 
#define ICE_AQC_CAPS_POST_UPDATE_RESET_RESTRICT		0x0077

#define ICE_AQC_CAPS_NVM_MGMT				0x0080

#define ICE_AQC_CAPS_TX_SCHED_TOPO_COMP_MODE		0x0085

#define ICE_AQC_CAPS_NAC_TOPOLOGY			0x0087

#define ICE_AQC_CAPS_FW_LAG_SUPPORT			0x0092

#define ICE_AQC_BIT_ROCEV2_LAG				0x01

#define ICE_AQC_BIT_SRIOV_LAG				0x02

drivers/net/ethernet/intel/ice/ice_common.c

+31 −0
Original line number Diff line number Diff line
@@ -2593,6 +2593,34 @@ ice_parse_sensor_reading_cap(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, 
		  dev_p->supported_sensors);

}



/**

 * ice_parse_nac_topo_dev_caps - Parse ICE_AQC_CAPS_NAC_TOPOLOGY cap

 * @hw: pointer to the HW struct

 * @dev_p: pointer to device capabilities structure

 * @cap: capability element to parse

 *

 * Parse ICE_AQC_CAPS_NAC_TOPOLOGY for device capabilities.

 */

static void ice_parse_nac_topo_dev_caps(struct ice_hw *hw,

					struct ice_hw_dev_caps *dev_p,

					struct ice_aqc_list_caps_elem *cap)

{

	dev_p->nac_topo.mode = le32_to_cpu(cap->number);

	dev_p->nac_topo.id = le32_to_cpu(cap->phys_id) & ICE_NAC_TOPO_ID_M;



	dev_info(ice_hw_to_dev(hw),

		 "PF is configured in %s mode with IP instance ID %d\n",

		 (dev_p->nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M) ?

		 "primary" : "secondary", dev_p->nac_topo.id);



	ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology is_primary = %d\n",

		  !!(dev_p->nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M));

	ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology is_dual = %d\n",

		  !!(dev_p->nac_topo.mode & ICE_NAC_TOPO_DUAL_M));

	ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology id = %d\n",

		  dev_p->nac_topo.id);

}



/**

 * ice_parse_dev_caps - Parse device capabilities

 * @hw: pointer to the HW struct
@@ -2644,6 +2672,9 @@ ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, 
		case ICE_AQC_CAPS_SENSOR_READING:

			ice_parse_sensor_reading_cap(hw, dev_p, &cap_resp[i]);

			break;

		case ICE_AQC_CAPS_NAC_TOPOLOGY:

			ice_parse_nac_topo_dev_caps(hw, dev_p, &cap_resp[i]);

			break;

		default:

			/* Don't list common capabilities as unknown */

			if (!found)

drivers/net/ethernet/intel/ice/ice_type.h

+10 −0
Original line number Diff line number Diff line
@@ -374,6 +374,15 @@ struct ice_ts_dev_info { 
	u8 ts_ll_int_read;

};



#define ICE_NAC_TOPO_PRIMARY_M	BIT(0)

#define ICE_NAC_TOPO_DUAL_M	BIT(1)

#define ICE_NAC_TOPO_ID_M	GENMASK(0xF, 0)



struct ice_nac_topology {

	u32 mode;

	u8 id;

};



/* Function specific capabilities */

struct ice_hw_func_caps {

	struct ice_hw_common_caps common_cap;
@@ -395,6 +404,7 @@ struct ice_hw_dev_caps { 
	u32 num_flow_director_fltr;	/* Number of FD filters available */

	struct ice_ts_dev_info ts_dev_info;

	u32 num_funcs;

	struct ice_nac_topology nac_topo;

	/* bitmap of supported sensors

	 * bit 0 - internal temperature sensor

	 * bit 31:1 - Reserved