Commit 600f72de authored by Sergey Matyukevich's avatar Sergey Matyukevich Committed by Paul Walmsley
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selftests: riscv: test ptrace vector interface 



Add a test case to check ptrace behavior in the case when vector
extension is supported by the system, but vector context is not
yet enabled for the traced process.

Signed-off-by: default avatarSergey Matyukevich <geomatsi@gmail.com>
Reviewed-by: default avatarAndy Chiu <andybnac@gmail.com>
Tested-by: default avatarAndy Chiu <andybnac@gmail.com>
Link: https://patch.msgid.link/20251214163537.1054292-6-geomatsi@gmail.com


[pjw@kernel.org: dropped duplicate sys/wait.h include]
Signed-off-by: default avatarPaul Walmsley <pjw@kernel.org>
parent f4be988f

tools/testing/selftests/riscv/vector/.gitignore

+2 −0
Original line number Diff line number Diff line
@@ -2,3 +2,5 @@ vstate_exec_nolibc 
vstate_prctl

v_initval

v_exec_initval_nolibc

vstate_ptrace

validate_v_ptrace

tools/testing/selftests/riscv/vector/Makefile

+9 −1
Original line number Diff line number Diff line
@@ -2,11 +2,14 @@ 
# Copyright (C) 2021 ARM Limited

# Originally tools/testing/arm64/abi/Makefile



TEST_GEN_PROGS := v_initval vstate_prctl vstate_ptrace

TEST_GEN_PROGS := v_initval vstate_prctl vstate_ptrace validate_v_ptrace

TEST_GEN_PROGS_EXTENDED := vstate_exec_nolibc v_exec_initval_nolibc

TEST_GEN_LIBS := v_helpers.c sys_hwprobe.c



include ../../lib.mk



TEST_GEN_OBJ := $(patsubst %.c, $(OUTPUT)/%.o, $(TEST_GEN_LIBS))



$(OUTPUT)/sys_hwprobe.o: ../hwprobe/sys_hwprobe.S

	$(CC) -static -c -o$@ $(CFLAGS) $^
@@ -29,3 +32,8 @@ $(OUTPUT)/v_exec_initval_nolibc: v_exec_initval_nolibc.c 


$(OUTPUT)/vstate_ptrace: vstate_ptrace.c $(OUTPUT)/sys_hwprobe.o $(OUTPUT)/v_helpers.o

	$(CC) -static -o$@ $(CFLAGS) $(LDFLAGS) $^



$(OUTPUT)/validate_v_ptrace: validate_v_ptrace.c $(OUTPUT)/sys_hwprobe.o $(OUTPUT)/v_helpers.o

	$(CC) -static -o$@ $(CFLAGS) $(LDFLAGS) $^



EXTRA_CLEAN += $(TEST_GEN_OBJ)

tools/testing/selftests/riscv/vector/v_helpers.c

+23 −0
Original line number Diff line number Diff line
@@ -26,6 +26,29 @@ bool is_vector_supported(void) 
	return pair.value & RISCV_HWPROBE_EXT_ZVE32X;

}



unsigned long get_vr_len(void)

{

	unsigned long vlenb;



	if (is_vector_supported()) {

		asm volatile("csrr %[vlenb], vlenb" : [vlenb] "=r"(vlenb));

		return vlenb;

	}



	if (is_xtheadvector_supported()) {

		asm volatile (

			// 0 | zimm[10:0] | rs1 | 1 1 1 | rd | 1010111 | vsetvli

			// vsetvli	t4, x0, e8, m1, d1

			".4byte		0b00000000000000000111111011010111\n\t"

			"mv		%[vlenb], t4\n\t"

			: [vlenb] "=r"(vlenb) : : "memory", "t4");

		return vlenb;

	}



	printf("WARNING: vector not supported\n");

	return 0;

}



int launch_test(char *next_program, int test_inherit, int xtheadvector)

{

	char *exec_argv[4], *exec_envp[1];

tools/testing/selftests/riscv/vector/v_helpers.h

+2 −0
Original line number Diff line number Diff line
@@ -5,4 +5,6 @@ bool is_xtheadvector_supported(void); 


bool is_vector_supported(void);



unsigned long get_vr_len(void);



int launch_test(char *next_program, int test_inherit, int xtheadvector);

tools/testing/selftests/riscv/vector/validate_v_ptrace.c

0 → 100644
+79 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

#include <sys/ptrace.h>

#include <sys/types.h>

#include <sys/wait.h>

#include <sys/uio.h>

#include <unistd.h>

#include <errno.h>



#include <linux/ptrace.h>

#include <linux/elf.h>



#include "kselftest_harness.h"

#include "v_helpers.h"



volatile unsigned long chld_lock;



TEST(ptrace_v_not_enabled)

{

	pid_t pid;



	if (!(is_vector_supported() || is_xtheadvector_supported()))

		SKIP(return, "Vector not supported");



	chld_lock = 1;

	pid = fork();

	ASSERT_LE(0, pid)

		TH_LOG("fork: %m");



	if (pid == 0) {

		while (chld_lock == 1)

			asm volatile("" : : "g"(chld_lock) : "memory");



		asm volatile ("ebreak" : : : );

	} else {

		struct __riscv_v_regset_state *regset_data;

		unsigned long vlenb = get_vr_len();

		size_t regset_size;

		struct iovec iov;

		int status;

		int ret;



		/* attach */



		ASSERT_EQ(0, ptrace(PTRACE_ATTACH, pid, NULL, NULL));

		ASSERT_EQ(pid, waitpid(pid, &status, 0));

		ASSERT_TRUE(WIFSTOPPED(status));



		/* unlock */



		ASSERT_EQ(0, ptrace(PTRACE_POKEDATA, pid, &chld_lock, 0));



		/* resume and wait for ebreak */



		ASSERT_EQ(0, ptrace(PTRACE_CONT, pid, NULL, NULL));

		ASSERT_EQ(pid, waitpid(pid, &status, 0));

		ASSERT_TRUE(WIFSTOPPED(status));



		/* try to read vector registers from the tracee */



		regset_size = sizeof(*regset_data) + vlenb * 32;

		regset_data = calloc(1, regset_size);



		iov.iov_base = regset_data;

		iov.iov_len = regset_size;



		/* V extension is available, but not yet enabled for the tracee */



		errno = 0;

		ret = ptrace(PTRACE_GETREGSET, pid, NT_RISCV_VECTOR, &iov);

		ASSERT_EQ(ENODATA, errno);

		ASSERT_EQ(-1, ret);



		/* cleanup */



		ASSERT_EQ(0, kill(pid, SIGKILL));

	}

}



TEST_HARNESS_MAIN