Commit 6025a81a authored by Georgi Djakov's avatar Georgi Djakov
Browse files

Merge branch 'icc-cleanup' into icc-next 



* icc-cleanup
  interconnect: qcom: sm8550: Remove bogus per-RSC BCMs and nodes
  dt-bindings: interconnect: Remove bogus interconnect nodes
  interconnect: qcom: x1e80100: Remove bogus per-RSC BCMs and nodes
  interconnect: qcom: sa8775p: constify pointer to qcom_icc_node
  interconnect: qcom: sm8250: constify pointer to qcom_icc_node
  interconnect: qcom: sm6115: constify pointer to qcom_icc_node
  interconnect: qcom: sa8775p: constify pointer to qcom_icc_bcm
  interconnect: qcom: x1e80100: constify pointer to qcom_icc_bcm
  dt-bindings: interconnect: qcom,rpmh: Fix bouncing @codeaurora address
  interconnect: constify of_phandle_args in xlate

Signed-off-by: default avatarGeorgi Djakov <djakov@kernel.org>
parents cd6d762c 0dc5b8ab

Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml

+1 −1
Original line number Diff line number Diff line
@@ -8,7 +8,7 @@ title: Qualcomm RPMh Network-On-Chip Interconnect 


maintainers:

  - Georgi Djakov <georgi.djakov@linaro.org>

  - Odelu Kukatla <okukatla@codeaurora.org>

  - Odelu Kukatla <quic_okukatla@quicinc.com>



description: |

   RPMh interconnect providers support system bandwidth requirements through

drivers/interconnect/core.c

+2 −2
Original line number Diff line number Diff line
@@ -343,7 +343,7 @@ EXPORT_SYMBOL_GPL(icc_std_aggregate); 
 * an array of icc nodes specified in the icc_onecell_data struct when

 * registering the provider.

 */

struct icc_node *of_icc_xlate_onecell(struct of_phandle_args *spec,

struct icc_node *of_icc_xlate_onecell(const struct of_phandle_args *spec,

				      void *data)

{

	struct icc_onecell_data *icc_data = data;
@@ -368,7 +368,7 @@ EXPORT_SYMBOL_GPL(of_icc_xlate_onecell); 
 * Returns a valid pointer to struct icc_node_data on success or ERR_PTR()

 * on failure.

 */

struct icc_node_data *of_icc_get_from_provider(struct of_phandle_args *spec)

struct icc_node_data *of_icc_get_from_provider(const struct of_phandle_args *spec)

{

	struct icc_node *node = ERR_PTR(-EPROBE_DEFER);

	struct icc_node_data *data = NULL;

drivers/interconnect/qcom/icc-common.c

+2 −1
Original line number Diff line number Diff line
@@ -9,7 +9,8 @@ 


#include "icc-common.h"



struct icc_node_data *qcom_icc_xlate_extended(struct of_phandle_args *spec, void *data)

struct icc_node_data *qcom_icc_xlate_extended(const struct of_phandle_args *spec,

					      void *data)

{

	struct icc_node_data *ndata;

	struct icc_node *node;

drivers/interconnect/qcom/icc-common.h

+2 −1
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 


#include <linux/interconnect-provider.h>



struct icc_node_data *qcom_icc_xlate_extended(struct of_phandle_args *spec, void *data);

struct icc_node_data *qcom_icc_xlate_extended(const struct of_phandle_args *spec,

					      void *data);



#endif

drivers/interconnect/qcom/sa8775p.c

+28 −28
Original line number Diff line number Diff line
@@ -2092,11 +2092,11 @@ static struct qcom_icc_bcm bcm_sn10 = { 
	.nodes = { &xs_qdss_stm },

};



static struct qcom_icc_bcm *aggre1_noc_bcms[] = {

static struct qcom_icc_bcm * const aggre1_noc_bcms[] = {

	&bcm_sn3,

};



static struct qcom_icc_node *aggre1_noc_nodes[] = {

static struct qcom_icc_node * const aggre1_noc_nodes[] = {

	[MASTER_QUP_3] = &qxm_qup3,

	[MASTER_EMAC] = &xm_emac_0,

	[MASTER_EMAC_1] = &xm_emac_1,
@@ -2115,12 +2115,12 @@ static const struct qcom_icc_desc sa8775p_aggre1_noc = { 
	.num_bcms = ARRAY_SIZE(aggre1_noc_bcms),

};



static struct qcom_icc_bcm *aggre2_noc_bcms[] = {

static struct qcom_icc_bcm * const aggre2_noc_bcms[] = {

	&bcm_ce0,

	&bcm_sn4,

};



static struct qcom_icc_node *aggre2_noc_nodes[] = {

static struct qcom_icc_node * const aggre2_noc_nodes[] = {

	[MASTER_QDSS_BAM] = &qhm_qdss_bam,

	[MASTER_QUP_0] = &qhm_qup0,

	[MASTER_QUP_1] = &qhm_qup1,
@@ -2142,13 +2142,13 @@ static const struct qcom_icc_desc sa8775p_aggre2_noc = { 
	.num_bcms = ARRAY_SIZE(aggre2_noc_bcms),

};



static struct qcom_icc_bcm *clk_virt_bcms[] = {

static struct qcom_icc_bcm * const clk_virt_bcms[] = {

	&bcm_qup0,

	&bcm_qup1,

	&bcm_qup2,

};



static struct qcom_icc_node *clk_virt_nodes[] = {

static struct qcom_icc_node * const clk_virt_nodes[] = {

	[MASTER_QUP_CORE_0] = &qup0_core_master,

	[MASTER_QUP_CORE_1] = &qup1_core_master,

	[MASTER_QUP_CORE_2] = &qup2_core_master,
@@ -2166,7 +2166,7 @@ static const struct qcom_icc_desc sa8775p_clk_virt = { 
	.num_bcms = ARRAY_SIZE(clk_virt_bcms),

};



static struct qcom_icc_bcm *config_noc_bcms[] = {

static struct qcom_icc_bcm * const config_noc_bcms[] = {

	&bcm_cn0,

	&bcm_cn1,

	&bcm_cn2,
@@ -2175,7 +2175,7 @@ static struct qcom_icc_bcm *config_noc_bcms[] = { 
	&bcm_sn10,

};



static struct qcom_icc_node *config_noc_nodes[] = {

static struct qcom_icc_node * const config_noc_nodes[] = {

	[MASTER_GEM_NOC_CNOC] = &qnm_gemnoc_cnoc,

	[MASTER_GEM_NOC_PCIE_SNOC] = &qnm_gemnoc_pcie,

	[SLAVE_AHB2PHY_0] = &qhs_ahb2phy0,
@@ -2271,10 +2271,10 @@ static const struct qcom_icc_desc sa8775p_config_noc = { 
	.num_bcms = ARRAY_SIZE(config_noc_bcms),

};



static struct qcom_icc_bcm *dc_noc_bcms[] = {

static struct qcom_icc_bcm * const dc_noc_bcms[] = {

};



static struct qcom_icc_node *dc_noc_nodes[] = {

static struct qcom_icc_node * const dc_noc_nodes[] = {

	[MASTER_CNOC_DC_NOC] = &qnm_cnoc_dc_noc,

	[SLAVE_LLCC_CFG] = &qhs_llcc,

	[SLAVE_GEM_NOC_CFG] = &qns_gemnoc,
@@ -2287,12 +2287,12 @@ static const struct qcom_icc_desc sa8775p_dc_noc = { 
	.num_bcms = ARRAY_SIZE(dc_noc_bcms),

};



static struct qcom_icc_bcm *gem_noc_bcms[] = {

static struct qcom_icc_bcm * const gem_noc_bcms[] = {

	&bcm_sh0,

	&bcm_sh2,

};



static struct qcom_icc_node *gem_noc_nodes[] = {

static struct qcom_icc_node * const gem_noc_nodes[] = {

	[MASTER_GPU_TCU] = &alm_gpu_tcu,

	[MASTER_PCIE_TCU] = &alm_pcie_tcu,

	[MASTER_SYS_TCU] = &alm_sys_tcu,
@@ -2323,12 +2323,12 @@ static const struct qcom_icc_desc sa8775p_gem_noc = { 
	.num_bcms = ARRAY_SIZE(gem_noc_bcms),

};



static struct qcom_icc_bcm *gpdsp_anoc_bcms[] = {

static struct qcom_icc_bcm * const gpdsp_anoc_bcms[] = {

	&bcm_gna0,

	&bcm_gnb0,

};



static struct qcom_icc_node *gpdsp_anoc_nodes[] = {

static struct qcom_icc_node * const gpdsp_anoc_nodes[] = {

	[MASTER_DSP0] = &qxm_dsp0,

	[MASTER_DSP1] = &qxm_dsp1,

	[SLAVE_GP_DSP_SAIL_NOC] = &qns_gp_dsp_sail_noc,
@@ -2341,11 +2341,11 @@ static const struct qcom_icc_desc sa8775p_gpdsp_anoc = { 
	.num_bcms = ARRAY_SIZE(gpdsp_anoc_bcms),

};



static struct qcom_icc_bcm *lpass_ag_noc_bcms[] = {

static struct qcom_icc_bcm * const lpass_ag_noc_bcms[] = {

	&bcm_sn9,

};



static struct qcom_icc_node *lpass_ag_noc_nodes[] = {

static struct qcom_icc_node * const lpass_ag_noc_nodes[] = {

	[MASTER_CNOC_LPASS_AG_NOC] = &qhm_config_noc,

	[MASTER_LPASS_PROC] = &qxm_lpass_dsp,

	[SLAVE_LPASS_CORE_CFG] = &qhs_lpass_core,
@@ -2364,12 +2364,12 @@ static const struct qcom_icc_desc sa8775p_lpass_ag_noc = { 
	.num_bcms = ARRAY_SIZE(lpass_ag_noc_bcms),

};



static struct qcom_icc_bcm *mc_virt_bcms[] = {

static struct qcom_icc_bcm * const mc_virt_bcms[] = {

	&bcm_acv,

	&bcm_mc0,

};



static struct qcom_icc_node *mc_virt_nodes[] = {

static struct qcom_icc_node * const mc_virt_nodes[] = {

	[MASTER_LLCC] = &llcc_mc,

	[SLAVE_EBI1] = &ebi,

};
@@ -2381,12 +2381,12 @@ static const struct qcom_icc_desc sa8775p_mc_virt = { 
	.num_bcms = ARRAY_SIZE(mc_virt_bcms),

};



static struct qcom_icc_bcm *mmss_noc_bcms[] = {

static struct qcom_icc_bcm * const mmss_noc_bcms[] = {

	&bcm_mm0,

	&bcm_mm1,

};



static struct qcom_icc_node *mmss_noc_nodes[] = {

static struct qcom_icc_node * const mmss_noc_nodes[] = {

	[MASTER_CAMNOC_HF] = &qnm_camnoc_hf,

	[MASTER_CAMNOC_ICP] = &qnm_camnoc_icp,

	[MASTER_CAMNOC_SF] = &qnm_camnoc_sf,
@@ -2413,12 +2413,12 @@ static const struct qcom_icc_desc sa8775p_mmss_noc = { 
	.num_bcms = ARRAY_SIZE(mmss_noc_bcms),

};



static struct qcom_icc_bcm *nspa_noc_bcms[] = {

static struct qcom_icc_bcm * const nspa_noc_bcms[] = {

	&bcm_nsa0,

	&bcm_nsa1,

};



static struct qcom_icc_node *nspa_noc_nodes[] = {

static struct qcom_icc_node * const nspa_noc_nodes[] = {

	[MASTER_CDSP_NOC_CFG] = &qhm_nsp_noc_config,

	[MASTER_CDSP_PROC] = &qxm_nsp,

	[SLAVE_HCP_A] = &qns_hcp,
@@ -2433,12 +2433,12 @@ static const struct qcom_icc_desc sa8775p_nspa_noc = { 
	.num_bcms = ARRAY_SIZE(nspa_noc_bcms),

};



static struct qcom_icc_bcm *nspb_noc_bcms[] = {

static struct qcom_icc_bcm * const nspb_noc_bcms[] = {

	&bcm_nsb0,

	&bcm_nsb1,

};



static struct qcom_icc_node *nspb_noc_nodes[] = {

static struct qcom_icc_node * const nspb_noc_nodes[] = {

	[MASTER_CDSPB_NOC_CFG] = &qhm_nspb_noc_config,

	[MASTER_CDSP_PROC_B] = &qxm_nspb,

	[SLAVE_CDSPB_MEM_NOC] = &qns_nspb_gemnoc,
@@ -2453,11 +2453,11 @@ static const struct qcom_icc_desc sa8775p_nspb_noc = { 
	.num_bcms = ARRAY_SIZE(nspb_noc_bcms),

};



static struct qcom_icc_bcm *pcie_anoc_bcms[] = {

static struct qcom_icc_bcm * const pcie_anoc_bcms[] = {

	&bcm_pci0,

};



static struct qcom_icc_node *pcie_anoc_nodes[] = {

static struct qcom_icc_node * const pcie_anoc_nodes[] = {

	[MASTER_PCIE_0] = &xm_pcie3_0,

	[MASTER_PCIE_1] = &xm_pcie3_1,

	[SLAVE_ANOC_PCIE_GEM_NOC] = &qns_pcie_mem_noc,
@@ -2470,7 +2470,7 @@ static const struct qcom_icc_desc sa8775p_pcie_anoc = { 
	.num_bcms = ARRAY_SIZE(pcie_anoc_bcms),

};



static struct qcom_icc_bcm *system_noc_bcms[] = {

static struct qcom_icc_bcm * const system_noc_bcms[] = {

	&bcm_sn0,

	&bcm_sn1,

	&bcm_sn3,
@@ -2478,7 +2478,7 @@ static struct qcom_icc_bcm *system_noc_bcms[] = { 
	&bcm_sn9,

};



static struct qcom_icc_node *system_noc_nodes[] = {

static struct qcom_icc_node * const system_noc_nodes[] = {

	[MASTER_GIC_AHB] = &qhm_gic,

	[MASTER_A1NOC_SNOC] = &qnm_aggre1_noc,

	[MASTER_A2NOC_SNOC] = &qnm_aggre2_noc,