Commit 606f6b17 authored by Harry Wentland's avatar Harry Wentland Committed by Alex Deucher
Browse files

drm/amd/display: Merge pipes for validate 



Validation expects to operate on non-split pipes. This is
seen in dcn20_fast_validate_bw, which merges pipes for
validation. We weren't doing that in the non-fast path
which lead to validation failures when operating with
4-to-1 MPC and a writeback connector.

Co-developed by Claude Sonnet 4.5

Assisted-by: Claude:claude-sonnet-4.5
Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarChuanyu Tseng <chuanyu.tseng@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c34cb0d8

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

+2 −0
Original line number Diff line number Diff line
@@ -1641,6 +1641,8 @@ noinline bool dcn30_internal_validate_bw( 
	if (!pipes)

		return false;



	dcn20_merge_pipes_for_validate(dc, context);



	context->bw_ctx.dml.vba.maxMpcComb = 0;

	context->bw_ctx.dml.vba.VoltageLevel = 0;

	context->bw_ctx.dml.vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;