Commit 60c16201 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-xe-fixes-2024-02-08' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-fixes 



Driver Changes:
- Fix a loop in an error path
- Fix a missing dma-fence reference
- Fix a retry path on userptr REMAP
- Workaround for a false gcc warning
- Fix missing map of the usm batch buffer
  in the migrate vm.
- Fix a memory leak.
- Fix a bad assumption of used page size
- Fix hitting a BUG() due to zero pages to map.
- Remove some leftover async bind queue relics

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Thomas Hellstrom <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ZcS2LllawGifubsk@fedora
parents 6c2bf9ca bf4c27b8

drivers/gpu/drm/xe/xe_display.c

+0 −6
Original line number Diff line number Diff line
@@ -134,8 +134,6 @@ static void xe_display_fini_nommio(struct drm_device *dev, void *dummy) 


int xe_display_init_nommio(struct xe_device *xe)

{

	int err;



	if (!xe->info.enable_display)

		return 0;
@@ -145,10 +143,6 @@ int xe_display_init_nommio(struct xe_device *xe) 
	/* This must be called before any calls to HAS_PCH_* */

	intel_detect_pch(xe);



	err = intel_power_domains_init(xe);

	if (err)

		return err;



	return drmm_add_action_or_reset(&xe->drm, xe_display_fini_nommio, xe);

}

drivers/gpu/drm/xe/xe_exec_queue.c

+6 −2
Original line number Diff line number Diff line
@@ -926,20 +926,24 @@ void xe_exec_queue_last_fence_put_unlocked(struct xe_exec_queue *q) 
 * @q: The exec queue

 * @vm: The VM the engine does a bind or exec for

 *

 * Get last fence, does not take a ref

 * Get last fence, takes a ref

 *

 * Returns: last fence if not signaled, dma fence stub if signaled

 */

struct dma_fence *xe_exec_queue_last_fence_get(struct xe_exec_queue *q,

					       struct xe_vm *vm)

{

	struct dma_fence *fence;



	xe_exec_queue_last_fence_lockdep_assert(q, vm);



	if (q->last_fence &&

	    test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &q->last_fence->flags))

		xe_exec_queue_last_fence_put(q, vm);



	return q->last_fence ? q->last_fence : dma_fence_get_stub();

	fence = q->last_fence ? q->last_fence : dma_fence_get_stub();

	dma_fence_get(fence);

	return fence;

}



/**

drivers/gpu/drm/xe/xe_gt.c

+4 −1
Original line number Diff line number Diff line
@@ -437,7 +437,10 @@ static int all_fw_domain_init(struct xe_gt *gt) 
		 * USM has its only SA pool to non-block behind user operations

		 */

		if (gt_to_xe(gt)->info.has_usm) {

			gt->usm.bb_pool = xe_sa_bo_manager_init(gt_to_tile(gt), SZ_1M, 16);

			struct xe_device *xe = gt_to_xe(gt);



			gt->usm.bb_pool = xe_sa_bo_manager_init(gt_to_tile(gt),

								IS_DGFX(xe) ? SZ_1M : SZ_512K, 16);

			if (IS_ERR(gt->usm.bb_pool)) {

				err = PTR_ERR(gt->usm.bb_pool);

				goto err_force_wake;

drivers/gpu/drm/xe/xe_gt_pagefault.c

+1 −1
Original line number Diff line number Diff line
@@ -335,7 +335,7 @@ int xe_guc_pagefault_handler(struct xe_guc *guc, u32 *msg, u32 len) 
		return -EPROTO;



	asid = FIELD_GET(PFD_ASID, msg[1]);

	pf_queue = &gt->usm.pf_queue[asid % NUM_PF_QUEUE];

	pf_queue = gt->usm.pf_queue + (asid % NUM_PF_QUEUE);



	spin_lock_irqsave(&pf_queue->lock, flags);

	full = pf_queue_full(pf_queue);

drivers/gpu/drm/xe/xe_migrate.c

+22 −6
Original line number Diff line number Diff line
@@ -170,10 +170,22 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m, 
	if (!IS_DGFX(xe)) {

		/* Write out batch too */

		m->batch_base_ofs = NUM_PT_SLOTS * XE_PAGE_SIZE;

		for (i = 0; i < batch->size;

		     i += vm->flags & XE_VM_FLAG_64K ? XE_64K_PAGE_SIZE :

		     XE_PAGE_SIZE) {

			entry = vm->pt_ops->pte_encode_bo(batch, i,

							  pat_index, 0);



			xe_map_wr(xe, &bo->vmap, map_ofs + level * 8, u64,

				  entry);

			level++;

		}

		if (xe->info.has_usm) {

			xe_tile_assert(tile, batch->size == SZ_1M);



			batch = tile->primary_gt->usm.bb_pool->bo;

			m->usm_batch_base_ofs = m->batch_base_ofs;

		}

			m->usm_batch_base_ofs = m->batch_base_ofs + SZ_1M;

			xe_tile_assert(tile, batch->size == SZ_512K);



			for (i = 0; i < batch->size;

			     i += vm->flags & XE_VM_FLAG_64K ? XE_64K_PAGE_SIZE :
@@ -185,6 +197,7 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m, 
					  entry);

				level++;

			}

		}

	} else {

		u64 batch_addr = xe_bo_addr(batch, 0, XE_PAGE_SIZE);
@@ -1204,9 +1217,12 @@ static bool no_in_syncs(struct xe_vm *vm, struct xe_exec_queue *q, 
	}

	if (q) {

		fence = xe_exec_queue_last_fence_get(q, vm);

		if (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))

		if (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {

			dma_fence_put(fence);

			return false;

		}

		dma_fence_put(fence);

	}



	return true;

}