Commit 60d2b2f3 authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

Merge tag 'kvm-riscv-6.11-1' of https://github.com/kvm-riscv/linux into HEAD 

KVM/riscv changes for 6.11

- Redirect AMO load/store access fault traps to guest
- Perf kvm stat support for RISC-V
- Use guest files for IMSIC virtualization, when available

ONE_REG support for the Zimop, Zcmop, Zca, Zcf, Zcd, Zcb and Zawrs ISA
extensions is coming through the RISC-V tree.
parents f3996d4d e3256183

arch/riscv/include/asm/kvm_aia_aplic.h

deleted100644 → 0
+0 −58
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/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (C) 2021 Western Digital Corporation or its affiliates.

 * Copyright (C) 2022 Ventana Micro Systems Inc.

 */

#ifndef __KVM_RISCV_AIA_IMSIC_H

#define __KVM_RISCV_AIA_IMSIC_H



#include <linux/bitops.h>



#define APLIC_MAX_IDC			BIT(14)

#define APLIC_MAX_SOURCE		1024



#define APLIC_DOMAINCFG			0x0000

#define APLIC_DOMAINCFG_RDONLY		0x80000000

#define APLIC_DOMAINCFG_IE		BIT(8)

#define APLIC_DOMAINCFG_DM		BIT(2)

#define APLIC_DOMAINCFG_BE		BIT(0)



#define APLIC_SOURCECFG_BASE		0x0004

#define APLIC_SOURCECFG_D		BIT(10)

#define APLIC_SOURCECFG_CHILDIDX_MASK	0x000003ff

#define APLIC_SOURCECFG_SM_MASK	0x00000007

#define APLIC_SOURCECFG_SM_INACTIVE	0x0

#define APLIC_SOURCECFG_SM_DETACH	0x1

#define APLIC_SOURCECFG_SM_EDGE_RISE	0x4

#define APLIC_SOURCECFG_SM_EDGE_FALL	0x5

#define APLIC_SOURCECFG_SM_LEVEL_HIGH	0x6

#define APLIC_SOURCECFG_SM_LEVEL_LOW	0x7



#define APLIC_IRQBITS_PER_REG		32



#define APLIC_SETIP_BASE		0x1c00

#define APLIC_SETIPNUM			0x1cdc



#define APLIC_CLRIP_BASE		0x1d00

#define APLIC_CLRIPNUM			0x1ddc



#define APLIC_SETIE_BASE		0x1e00

#define APLIC_SETIENUM			0x1edc



#define APLIC_CLRIE_BASE		0x1f00

#define APLIC_CLRIENUM			0x1fdc



#define APLIC_SETIPNUM_LE		0x2000

#define APLIC_SETIPNUM_BE		0x2004



#define APLIC_GENMSI			0x3000



#define APLIC_TARGET_BASE		0x3004

#define APLIC_TARGET_HART_IDX_SHIFT	18

#define APLIC_TARGET_HART_IDX_MASK	0x3fff

#define APLIC_TARGET_GUEST_IDX_SHIFT	12

#define APLIC_TARGET_GUEST_IDX_MASK	0x3f

#define APLIC_TARGET_IPRIO_MASK	0xff

#define APLIC_TARGET_EIID_MASK	0x7ff



#endif

arch/riscv/include/asm/kvm_aia_imsic.h

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Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (C) 2021 Western Digital Corporation or its affiliates.

 * Copyright (C) 2022 Ventana Micro Systems Inc.

 */

#ifndef __KVM_RISCV_AIA_IMSIC_H

#define __KVM_RISCV_AIA_IMSIC_H



#include <linux/types.h>

#include <asm/csr.h>



#define IMSIC_MMIO_PAGE_SHIFT		12

#define IMSIC_MMIO_PAGE_SZ		(1UL << IMSIC_MMIO_PAGE_SHIFT)

#define IMSIC_MMIO_PAGE_LE		0x00

#define IMSIC_MMIO_PAGE_BE		0x04



#define IMSIC_MIN_ID			63

#define IMSIC_MAX_ID			2048



#define IMSIC_EIDELIVERY		0x70



#define IMSIC_EITHRESHOLD		0x72



#define IMSIC_EIP0			0x80

#define IMSIC_EIP63			0xbf

#define IMSIC_EIPx_BITS			32



#define IMSIC_EIE0			0xc0

#define IMSIC_EIE63			0xff

#define IMSIC_EIEx_BITS			32



#define IMSIC_FIRST			IMSIC_EIDELIVERY

#define IMSIC_LAST			IMSIC_EIE63



#define IMSIC_MMIO_SETIPNUM_LE		0x00

#define IMSIC_MMIO_SETIPNUM_BE		0x04



#endif

arch/riscv/kvm/aia.c

+21 −14
Original line number Diff line number Diff line
@@ -10,12 +10,12 @@ 
#include <linux/kernel.h>

#include <linux/bitops.h>

#include <linux/irq.h>

#include <linux/irqchip/riscv-imsic.h>

#include <linux/irqdomain.h>

#include <linux/kvm_host.h>

#include <linux/percpu.h>

#include <linux/spinlock.h>

#include <asm/cpufeature.h>

#include <asm/kvm_aia_imsic.h>



struct aia_hgei_control {

	raw_spinlock_t lock;
@@ -394,6 +394,8 @@ int kvm_riscv_aia_alloc_hgei(int cpu, struct kvm_vcpu *owner, 
{

	int ret = -ENOENT;

	unsigned long flags;

	const struct imsic_global_config *gc;

	const struct imsic_local_config *lc;

	struct aia_hgei_control *hgctrl = per_cpu_ptr(&aia_hgei, cpu);



	if (!kvm_riscv_aia_available() || !hgctrl)
@@ -409,11 +411,14 @@ int kvm_riscv_aia_alloc_hgei(int cpu, struct kvm_vcpu *owner, 


	raw_spin_unlock_irqrestore(&hgctrl->lock, flags);



	/* TODO: To be updated later by AIA IMSIC HW guest file support */

	gc = imsic_get_global_config();

	lc = (gc) ? per_cpu_ptr(gc->local, cpu) : NULL;

	if (lc && ret > 0) {

		if (hgei_va)

		*hgei_va = NULL;

			*hgei_va = lc->msi_va + (ret * IMSIC_MMIO_PAGE_SZ);

		if (hgei_pa)

		*hgei_pa = 0;

			*hgei_pa = lc->msi_pa + (ret * IMSIC_MMIO_PAGE_SZ);

	}



	return ret;

}
@@ -605,9 +610,11 @@ void kvm_riscv_aia_disable(void) 
int kvm_riscv_aia_init(void)

{

	int rc;

	const struct imsic_global_config *gc;



	if (!riscv_isa_extension_available(NULL, SxAIA))

		return -ENODEV;

	gc = imsic_get_global_config();



	/* Figure-out number of bits in HGEIE */

	csr_write(CSR_HGEIE, -1UL);
@@ -619,17 +626,17 @@ int kvm_riscv_aia_init(void) 
	/*

	 * Number of usable HGEI lines should be minimum of per-HART

	 * IMSIC guest files and number of bits in HGEIE

	 *

	 * TODO: To be updated later by AIA IMSIC HW guest file support

	 */

	if (gc)

		kvm_riscv_aia_nr_hgei = min((ulong)kvm_riscv_aia_nr_hgei,

					    BIT(gc->guest_index_bits) - 1);

	else

		kvm_riscv_aia_nr_hgei = 0;



	/*

	 * Find number of guest MSI IDs

	 *

	 * TODO: To be updated later by AIA IMSIC HW guest file support

	 */

	/* Find number of guest MSI IDs */

	kvm_riscv_aia_max_ids = IMSIC_MAX_ID;

	if (gc && kvm_riscv_aia_nr_hgei)

		kvm_riscv_aia_max_ids = gc->nr_guest_ids + 1;



	/* Initialize guest external interrupt line management */

	rc = aia_hgei_init();

arch/riscv/kvm/aia_aplic.c

+1 −1
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@@ -7,12 +7,12 @@ 
 *	Anup Patel <apatel@ventanamicro.com>

 */



#include <linux/irqchip/riscv-aplic.h>

#include <linux/kvm_host.h>

#include <linux/math.h>

#include <linux/spinlock.h>

#include <linux/swab.h>

#include <kvm/iodev.h>

#include <asm/kvm_aia_aplic.h>



struct aplic_irq {

	raw_spinlock_t lock;

arch/riscv/kvm/aia_device.c

+1 −1
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@@ -8,9 +8,9 @@ 
 */



#include <linux/bits.h>

#include <linux/irqchip/riscv-imsic.h>

#include <linux/kvm_host.h>

#include <linux/uaccess.h>

#include <asm/kvm_aia_imsic.h>



static void unlock_vcpus(struct kvm *kvm, int vcpu_lock_idx)

{