Commit 6118ebed authored by Pincheng Wang's avatar Pincheng Wang Committed by Paul Walmsley
Browse files

riscv: hwprobe: export Zilsd and Zclsd ISA extensions 



Export Zilsd and Zclsd ISA extensions through hwprobe.

Signed-off-by: default avatarPincheng Wang <pincheng.plct@isrc.iscas.ac.cn>
Reviewed-by: default avatarNutty Liu <nutty.liu@hotmail.com>
Link: https://patch.msgid.link/20250826162939.1494021-4-pincheng.plct@isrc.iscas.ac.cn


[pjw@kernel.org: fixed whitespace; updated to apply]
Signed-off-by: default avatarPaul Walmsley <pjw@kernel.org>
parent 3f0cbfb8

Documentation/arch/riscv/hwprobe.rst

+8 −0
Original line number Diff line number Diff line
@@ -281,6 +281,14 @@ The following keys are defined: 
  * :c:macro:`RISCV_HWPROBE_EXT_ZICBOP`: The Zicbop extension is supported, as

       ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs.



  * :c:macro:`RISCV_HWPROBE_EXT_ZILSD`: The Zilsd extension is supported as

       defined in the RISC-V ISA manual starting from commit f88abf1 ("Integrating

       load/store pair for RV32 with the main manual") of the riscv-isa-manual.



  * :c:macro:`RISCV_HWPROBE_EXT_ZCLSD`: The Zclsd extension is supported as

       defined in the RISC-V ISA manual starting from commit f88abf1 ("Integrating

       load/store pair for RV32 with the main manual") of the riscv-isa-manual.



* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: Deprecated.  Returns similar values to

     :c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`, but the key was

     mistakenly classified as a bitmask rather than a value.

arch/riscv/include/uapi/asm/hwprobe.h

+3 −0
Original line number Diff line number Diff line
@@ -84,6 +84,9 @@ struct riscv_hwprobe { 
#define		RISCV_HWPROBE_EXT_ZABHA		(1ULL << 58)

#define		RISCV_HWPROBE_EXT_ZALASR	(1ULL << 59)

#define		RISCV_HWPROBE_EXT_ZICBOP	(1ULL << 60)

#define		RISCV_HWPROBE_EXT_ZILSD		(1ULL << 61)

#define		RISCV_HWPROBE_EXT_ZCLSD		(1ULL << 62)



#define RISCV_HWPROBE_KEY_CPUPERF_0	5

#define		RISCV_HWPROBE_MISALIGNED_UNKNOWN	(0 << 0)

#define		RISCV_HWPROBE_MISALIGNED_EMULATED	(1 << 0)

arch/riscv/kernel/sys_hwprobe.c

+2 −0
Original line number Diff line number Diff line
@@ -121,6 +121,7 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, 
		EXT_KEY(ZBS);

		EXT_KEY(ZCA);

		EXT_KEY(ZCB);

		EXT_KEY(ZCLSD);

		EXT_KEY(ZCMOP);

		EXT_KEY(ZICBOM);

		EXT_KEY(ZICBOP);
@@ -130,6 +131,7 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, 
		EXT_KEY(ZIHINTNTL);

		EXT_KEY(ZIHINTPAUSE);

		EXT_KEY(ZIHPM);

		EXT_KEY(ZILSD);

		EXT_KEY(ZIMOP);

		EXT_KEY(ZKND);

		EXT_KEY(ZKNE);