Commit 6143f961 authored by Dave Jiang's avatar Dave Jiang Committed by Rafael J. Wysocki
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ACPICA: HMAT: Add extended linear address mode to MSCIS 

ACPICA commit aaa08569b81aa4d9ff59f91f00e589e98d499e6c

Redefine the 2 reserved bytes at offset 28 of Memory Side Cache Information
Structure as "Address Mode" and add defines of the new value.

    * 0 - Reserved (Unkown Address Mode)
    * 1 - Extended-linear (N direct-map aliases linearly mapped)
    * 2..65535 - Reserved (Unknown Address Mode)

Link: https://github.com/acpica/acpica/commit/aaa08569


Signed-off-by: default avatarDave Jiang <dave.jiang@intel.com>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent 5506544d

include/acpi/actbl1.h

+4 −1
Original line number Diff line number Diff line
@@ -1796,7 +1796,7 @@ struct acpi_hmat_cache { 
	u32 reserved1;

	u64 cache_size;

	u32 cache_attributes;

	u16 reserved2;

	u16 address_mode;

	u16 number_of_SMBIOShandles;

};
@@ -1808,6 +1808,9 @@ struct acpi_hmat_cache { 
#define ACPI_HMAT_WRITE_POLICY          (0x0000F000)

#define ACPI_HMAT_CACHE_LINE_SIZE       (0xFFFF0000)



#define ACPI_HMAT_CACHE_MODE_UNKNOWN            (0)

#define ACPI_HMAT_CACHE_MODE_EXTENDED_LINEAR    (1)



/* Values for cache associativity flag */



#define ACPI_HMAT_CA_NONE                     (0)