Merge branches 'amba' and 'misc' into for-linus

	select GENERIC_CLOCKEVENTS_BROADCAST if SMP

	select GENERIC_IRQ_IPI if SMP

	select GENERIC_CPU_AUTOPROBE

	select GENERIC_CPU_DEVICES

	select GENERIC_EARLY_IOREMAP

	select GENERIC_IDLE_POLL_SETUP

	select GENERIC_IRQ_MULTI_HANDLER

#include <linux/cpu.h>

struct cpuinfo_arm {

	struct cpu	cpu;

	u32		cpuid;

#ifdef CONFIG_SMP

	unsigned int	loops_per_jiffy;

};

struct dma_iommu_mapping *

arm_iommu_create_mapping(const struct bus_type *bus, dma_addr_t base, u64 size);

arm_iommu_create_mapping(struct device *dev, dma_addr_t base, u64 size);

void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping);

/*

 * TTBCR register bits.

 *

 * The ORGN0 and IRGN0 bits enables different forms of caching when

 * walking the translation table. Clearing these bits (which is claimed

 * to be the reset default) means "normal memory, [outer|inner]

 * non-cacheable"

 */

#define TTBCR_EAE		(1 << 31)

#define TTBCR_IMP		(1 << 30)

		mdesc->init_early();

}

static int __init topology_init(void)

bool arch_cpu_is_hotpluggable(int num)

{

	int cpu;

	for_each_possible_cpu(cpu) {

		struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu);

		cpuinfo->cpu.hotpluggable = platform_can_hotplug_cpu(cpu);

		register_cpu(&cpuinfo->cpu, cpu);

	}

	return 0;

	return platform_can_hotplug_cpu(num);

}

subsys_initcall(topology_init);

#ifdef CONFIG_HAVE_PROC_CPU

static int __init proc_cpu_init(void)