Commit 61ef6208 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2024-04-26' of https://gitlab.freedesktop.org/drm/kernel 

Pull drm fixes from Dave Airlie:
 "Regular weekly merge request, mostly amdgpu and misc bits in
  xe/etnaviv/gma500 and some core changes. Nothing too outlandish, seems
  to be about normal for this time of release.

  atomic-helpers:
   - Fix memory leak in drm_format_conv_state_copy()

  fbdev:
   - fbdefio: Fix address calculation

  amdgpu:
   - Suspend/resume fix
   - Don't expose gpu_od directory if it's empty
   - SDMA 4.4.2 fix
   - VPE fix
   - BO eviction fix
   - UMSCH fix
   - SMU 13.0.6 reset fixes
   - GPUVM flush accounting fix
   - SDMA 5.2 fix
   - Fix possible UAF in mes code

  amdkfd:
   - Eviction fence handling fix
   - Fix memory leak when GPU memory allocation fails
   - Fix dma-buf validation
   - Fix rescheduling of restore worker
   - SVM fix

  gma500:
   - Fix crash during boot

  etnaviv:
   - fix GC7000 TX clock gating
   - revert NPU UAPI changes

  xe:
   - Fix error paths on managed allocations
   - Fix PF/VF relay messages"

* tag 'drm-fixes-2024-04-26' of https://gitlab.freedesktop.org/drm/kernel: (23 commits)
  Revert "drm/etnaviv: Expose a few more chipspecs to userspace"
  drm/etnaviv: fix tx clock gating on some GC7000 variants
  drm/xe/guc: Fix arguments passed to relay G2H handlers
  drm/xe: call free_gsc_pkt only once on action add failure
  drm/xe: Remove sysfs only once on action add failure
  fbdev: fix incorrect address computation in deferred IO
  drm/amdgpu/mes: fix use-after-free issue
  drm/amdgpu/sdma5.2: use legacy HDP flush for SDMA2/3
  drm/amdgpu: Fix the ring buffer size for queue VM flush
  drm/amdkfd: Add VRAM accounting for SVM migration
  drm/amd/pm: Restore config space after reset
  drm/amdgpu/umsch: don't execute umsch test when GPU is in reset/suspend
  drm/amdkfd: Fix rescheduling of restore worker
  drm/amdgpu: Update BO eviction priorities
  drm/amdgpu/vpe: fix vpe dpm setup failed
  drm/amdgpu: Assign correct bits for SDMA HDP flush
  drm/amdgpu/pm: Remove gpu_od if it's an empty directory
  drm/amdkfd: make sure VM is ready for updating operations
  drm/amdgpu: Fix leak when GPU memory allocation fails
  drm/amdkfd: Fix eviction fence handling
  ...
parents c942a0cd 3a853403

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

+21 −14
Original line number Diff line number Diff line
@@ -1854,6 +1854,7 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu( 
err_bo_create:

	amdgpu_amdkfd_unreserve_mem_limit(adev, aligned_size, flags, xcp_id);

err_reserve_limit:

	amdgpu_sync_free(&(*mem)->sync);

	mutex_destroy(&(*mem)->lock);

	if (gobj)

		drm_gem_object_put(gobj);
@@ -2900,13 +2901,12 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence __rcu * 


	amdgpu_sync_create(&sync_obj);



	/* Validate BOs and map them to GPUVM (update VM page tables). */

	/* Validate BOs managed by KFD */

	list_for_each_entry(mem, &process_info->kfd_bo_list,

			    validate_list) {



		struct amdgpu_bo *bo = mem->bo;

		uint32_t domain = mem->domain;

		struct kfd_mem_attachment *attachment;

		struct dma_resv_iter cursor;

		struct dma_fence *fence;
@@ -2931,6 +2931,25 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence __rcu * 
				goto validate_map_fail;

			}

		}

	}



	if (failed_size)

		pr_debug("0x%lx/0x%lx in system\n", failed_size, total_size);



	/* Validate PDs, PTs and evicted DMABuf imports last. Otherwise BO

	 * validations above would invalidate DMABuf imports again.

	 */

	ret = process_validate_vms(process_info, &exec.ticket);

	if (ret) {

		pr_debug("Validating VMs failed, ret: %d\n", ret);

		goto validate_map_fail;

	}



	/* Update mappings managed by KFD. */

	list_for_each_entry(mem, &process_info->kfd_bo_list,

			    validate_list) {

		struct kfd_mem_attachment *attachment;



		list_for_each_entry(attachment, &mem->attachments, list) {

			if (!attachment->is_mapped)

				continue;
@@ -2947,18 +2966,6 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence __rcu * 
		}

	}



	if (failed_size)

		pr_debug("0x%lx/0x%lx in system\n", failed_size, total_size);



	/* Validate PDs, PTs and evicted DMABuf imports last. Otherwise BO

	 * validations above would invalidate DMABuf imports again.

	 */

	ret = process_validate_vms(process_info, &exec.ticket);

	if (ret) {

		pr_debug("Validating VMs failed, ret: %d\n", ret);

		goto validate_map_fail;

	}



	/* Update mappings not managed by KFD */

	list_for_each_entry(peer_vm, &process_info->vm_list_head,

			vm_list_node) {

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

+1 −0
Original line number Diff line number Diff line
@@ -1132,6 +1132,7 @@ void amdgpu_mes_remove_ring(struct amdgpu_device *adev, 
		return;



	amdgpu_mes_remove_hw_queue(adev, ring->hw_queue_id);

	del_timer_sync(&ring->fence_drv.fallback_timer);

	amdgpu_ring_fini(ring);

	kfree(ring);

}

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

+2 −0
Original line number Diff line number Diff line
@@ -605,6 +605,8 @@ int amdgpu_bo_create(struct amdgpu_device *adev, 
	else

		amdgpu_bo_placement_from_domain(bo, bp->domain);

	if (bp->type == ttm_bo_type_kernel)

		bo->tbo.priority = 2;

	else if (!(bp->flags & AMDGPU_GEM_CREATE_DISCARDABLE))

		bo->tbo.priority = 1;



	if (!bp->destroy)

drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c

+3 −0
Original line number Diff line number Diff line
@@ -774,6 +774,9 @@ static int umsch_mm_late_init(void *handle) 
{

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;



	if (amdgpu_in_reset(adev) || adev->in_s0ix || adev->in_suspend)

		return 0;



	return umsch_mm_test(adev);

}

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

+1 −1
Original line number Diff line number Diff line
@@ -205,7 +205,7 @@ int amdgpu_vpe_configure_dpm(struct amdgpu_vpe *vpe) 
	dpm_ctl &= 0xfffffffe; /* Disable DPM */

	WREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_enable), dpm_ctl);

	dev_dbg(adev->dev, "%s: disable vpe dpm\n", __func__);

	return 0;

	return -EINVAL;

}



int amdgpu_vpe_psp_update_sram(struct amdgpu_device *adev)