Commit 624f494e authored by Xin Wang's avatar Xin Wang Committed by Matt Roper
Browse files

drm/xe: Refactor PAT dump to use shared helpers 



Move the PAT entry formatting into shared helper functions to ensure
consistency and enable code reuse.

This preparation is necessary for a follow-up patch that introduces a
software-based PAT dump, which is required for debugging on VFs where
hardware access is limited.

V2: (Matt)
- Xe3p XPC doesn’t define COMP_EN; omit it to match bspec and avoid
confusion.

Suggested-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarXin Wang <x.wang@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patch.msgid.link/20251205070220.27859-1-x.wang@intel.com
parent c7ea291b

drivers/gpu/drm/xe/xe_pat.c

+64 −44
Original line number Diff line number Diff line
@@ -50,8 +50,37 @@ 
#define XELP_PAT_WC				REG_FIELD_PREP(XELP_MEM_TYPE_MASK, 1)

#define XELP_PAT_UC				REG_FIELD_PREP(XELP_MEM_TYPE_MASK, 0)



#define PAT_LABEL_LEN 20



static const char *XELP_MEM_TYPE_STR_MAP[] = { "UC", "WC", "WT", "WB" };



static void xe_pat_index_label(char *label, size_t len, int index)

{

	snprintf(label, len, "PAT[%2d] ", index);

}



static void xelp_pat_entry_dump(struct drm_printer *p, int index, u32 pat)

{

	u8 mem_type = REG_FIELD_GET(XELP_MEM_TYPE_MASK, pat);



	drm_printf(p, "PAT[%2d] = %s (%#8x)\n", index,

		   XELP_MEM_TYPE_STR_MAP[mem_type], pat);

}



static void xehpc_pat_entry_dump(struct drm_printer *p, int index, u32 pat)

{

	drm_printf(p, "PAT[%2d] = [ %u, %u ] (%#8x)\n", index,

		   REG_FIELD_GET(XELP_MEM_TYPE_MASK, pat),

		   REG_FIELD_GET(XEHPC_CLOS_LEVEL_MASK, pat), pat);

}



static void xelpg_pat_entry_dump(struct drm_printer *p, int index, u32 pat)

{

	drm_printf(p, "PAT[%2d] = [ %u, %u ] (%#8x)\n", index,

		   REG_FIELD_GET(XELPG_L4_POLICY_MASK, pat),

		   REG_FIELD_GET(XELPG_INDEX_COH_MODE_MASK, pat), pat);

}



struct xe_pat_ops {

	void (*program_graphics)(struct xe_gt *gt, const struct xe_pat_table_entry table[],

				 int n_entries);
@@ -249,10 +278,8 @@ static int xelp_dump(struct xe_gt *gt, struct drm_printer *p) 


	for (i = 0; i < xe->pat.n_entries; i++) {

		u32 pat = xe_mmio_read32(&gt->mmio, XE_REG(_PAT_INDEX(i)));

		u8 mem_type = REG_FIELD_GET(XELP_MEM_TYPE_MASK, pat);



		drm_printf(p, "PAT[%2d] = %s (%#8x)\n", i,

			   XELP_MEM_TYPE_STR_MAP[mem_type], pat);

		xelp_pat_entry_dump(p, i, pat);

	}



	return 0;
@@ -276,12 +303,8 @@ static int xehp_dump(struct xe_gt *gt, struct drm_printer *p) 


	for (i = 0; i < xe->pat.n_entries; i++) {

		u32 pat = xe_gt_mcr_unicast_read_any(gt, XE_REG_MCR(_PAT_INDEX(i)));

		u8 mem_type;



		mem_type = REG_FIELD_GET(XELP_MEM_TYPE_MASK, pat);



		drm_printf(p, "PAT[%2d] = %s (%#8x)\n", i,

			   XELP_MEM_TYPE_STR_MAP[mem_type], pat);

		xelp_pat_entry_dump(p, i, pat);

	}



	return 0;
@@ -306,9 +329,7 @@ static int xehpc_dump(struct xe_gt *gt, struct drm_printer *p) 
	for (i = 0; i < xe->pat.n_entries; i++) {

		u32 pat = xe_gt_mcr_unicast_read_any(gt, XE_REG_MCR(_PAT_INDEX(i)));



		drm_printf(p, "PAT[%2d] = [ %u, %u ] (%#8x)\n", i,

			   REG_FIELD_GET(XELP_MEM_TYPE_MASK, pat),

			   REG_FIELD_GET(XEHPC_CLOS_LEVEL_MASK, pat), pat);

		xehpc_pat_entry_dump(p, i, pat);

	}



	return 0;
@@ -338,9 +359,7 @@ static int xelpg_dump(struct xe_gt *gt, struct drm_printer *p) 
		else

			pat = xe_gt_mcr_unicast_read_any(gt, XE_REG_MCR(_PAT_INDEX(i)));



		drm_printf(p, "PAT[%2d] = [ %u, %u ] (%#8x)\n", i,

			   REG_FIELD_GET(XELPG_L4_POLICY_MASK, pat),

			   REG_FIELD_GET(XELPG_INDEX_COH_MODE_MASK, pat), pat);

		xelpg_pat_entry_dump(p, i, pat);

	}



	return 0;
@@ -356,11 +375,35 @@ static const struct xe_pat_ops xelpg_pat_ops = { 
	.dump = xelpg_dump,

};



static void xe2_pat_entry_dump(struct drm_printer *p, const char *label, u32 pat, bool rsvd)

{

	drm_printf(p, "%s= [ %u, %u, %u, %u, %u, %u ]  (%#8x)%s\n", label,

		   !!(pat & XE2_NO_PROMOTE),

		   !!(pat & XE2_COMP_EN),

		   REG_FIELD_GET(XE2_L3_CLOS, pat),

		   REG_FIELD_GET(XE2_L3_POLICY, pat),

		   REG_FIELD_GET(XE2_L4_POLICY, pat),

		   REG_FIELD_GET(XE2_COH_MODE, pat),

		   pat, rsvd ? " *" : "");

}



static void xe3p_xpc_pat_entry_dump(struct drm_printer *p, const char *label, u32 pat, bool rsvd)

{

	drm_printf(p, "%s= [ %u, %u, %u, %u, %u ]  (%#8x)%s\n", label,

		   !!(pat & XE2_NO_PROMOTE),

		   REG_FIELD_GET(XE2_L3_CLOS, pat),

		   REG_FIELD_GET(XE2_L3_POLICY, pat),

		   REG_FIELD_GET(XE2_L4_POLICY, pat),

		   REG_FIELD_GET(XE2_COH_MODE, pat),

		   pat, rsvd ? " *" : "");

}



static int xe2_dump(struct xe_gt *gt, struct drm_printer *p)

{

	struct xe_device *xe = gt_to_xe(gt);

	u32 pat;

	int i;

	char label[PAT_LABEL_LEN];



	CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT);

	if (!fw_ref.domains)
@@ -374,14 +417,8 @@ static int xe2_dump(struct xe_gt *gt, struct drm_printer *p) 
		else

			pat = xe_gt_mcr_unicast_read_any(gt, XE_REG_MCR(_PAT_INDEX(i)));



		drm_printf(p, "PAT[%2d] = [ %u, %u, %u, %u, %u, %u ]  (%#8x)%s\n", i,

			   !!(pat & XE2_NO_PROMOTE),

			   !!(pat & XE2_COMP_EN),

			   REG_FIELD_GET(XE2_L3_CLOS, pat),

			   REG_FIELD_GET(XE2_L3_POLICY, pat),

			   REG_FIELD_GET(XE2_L4_POLICY, pat),

			   REG_FIELD_GET(XE2_COH_MODE, pat),

			   pat, xe->pat.table[i].valid ? "" : " *");

		xe_pat_index_label(label, sizeof(label), i);

		xe2_pat_entry_dump(p, label, pat, !xe->pat.table[i].valid);

	}



	/*
@@ -394,14 +431,7 @@ static int xe2_dump(struct xe_gt *gt, struct drm_printer *p) 
		pat = xe_gt_mcr_unicast_read_any(gt, XE_REG_MCR(_PAT_PTA));



	drm_printf(p, "Page Table Access:\n");

	drm_printf(p, "PTA_MODE= [ %u, %u, %u, %u, %u, %u ]  (%#8x)\n",

		   !!(pat & XE2_NO_PROMOTE),

		   !!(pat & XE2_COMP_EN),

		   REG_FIELD_GET(XE2_L3_CLOS, pat),

		   REG_FIELD_GET(XE2_L3_POLICY, pat),

		   REG_FIELD_GET(XE2_L4_POLICY, pat),

		   REG_FIELD_GET(XE2_COH_MODE, pat),

		   pat);

	xe2_pat_entry_dump(p, "PTA_MODE", pat, false);



	return 0;

}
@@ -417,6 +447,7 @@ static int xe3p_xpc_dump(struct xe_gt *gt, struct drm_printer *p) 
	struct xe_device *xe = gt_to_xe(gt);

	u32 pat;

	int i;

	char label[PAT_LABEL_LEN];



	CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT);

	if (!fw_ref.domains)
@@ -427,13 +458,8 @@ static int xe3p_xpc_dump(struct xe_gt *gt, struct drm_printer *p) 
	for (i = 0; i < xe->pat.n_entries; i++) {

		pat = xe_gt_mcr_unicast_read_any(gt, XE_REG_MCR(_PAT_INDEX(i)));



		drm_printf(p, "PAT[%2d] = [ %u, %u, %u, %u, %u ]  (%#8x)%s\n", i,

			   !!(pat & XE2_NO_PROMOTE),

			   REG_FIELD_GET(XE2_L3_CLOS, pat),

			   REG_FIELD_GET(XE2_L3_POLICY, pat),

			   REG_FIELD_GET(XE2_L4_POLICY, pat),

			   REG_FIELD_GET(XE2_COH_MODE, pat),

			   pat, xe->pat.table[i].valid ? "" : " *");

		xe_pat_index_label(label, sizeof(label), i);

		xe3p_xpc_pat_entry_dump(p, label, pat, !xe->pat.table[i].valid);

	}



	/*
@@ -443,13 +469,7 @@ static int xe3p_xpc_dump(struct xe_gt *gt, struct drm_printer *p) 
	pat = xe_gt_mcr_unicast_read_any(gt, XE_REG_MCR(_PAT_PTA));



	drm_printf(p, "Page Table Access:\n");

	drm_printf(p, "PTA_MODE= [ %u, %u, %u, %u, %u ]  (%#8x)\n",

		   !!(pat & XE2_NO_PROMOTE),

		   REG_FIELD_GET(XE2_L3_CLOS, pat),

		   REG_FIELD_GET(XE2_L3_POLICY, pat),

		   REG_FIELD_GET(XE2_L4_POLICY, pat),

		   REG_FIELD_GET(XE2_COH_MODE, pat),

		   pat);

	xe3p_xpc_pat_entry_dump(p, "PTA_MODE", pat, false);



	return 0;

}