Unverified Commit 6266f4a7 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Rodrigo Vivi
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drm/i915/cdclk: Do cdclk post plane programming later 



We currently call intel_set_cdclk_post_plane_update() far
too early. When pipes are active during the reprogramming
the current spot only works for the cd2x divider update
case, as that is synchronize to the pipe's vblank. Squashing
and crawling are not synchronized in any way, so doing the
programming while the pipes/planes are potentially still using
the old hardware state could lead to underruns.

Move the post plane reprgramming to a spot where we know
that the pipes/planes have switched over the new hardware
state.

Cc: stable@vger.kernel.org
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250218211913.27867-2-ville.syrjala@linux.intel.com


Reviewed-by: default avatarVinod Govindapillai <vinod.govindapillai@intel.com>
(cherry picked from commit fb64f556)
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent 80e54e84

drivers/gpu/drm/i915/display/intel_display.c

+2 −3
Original line number Diff line number Diff line
@@ -7830,9 +7830,6 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) 


	intel_program_dpkgc_latency(state);



	if (state->modeset)

		intel_set_cdclk_post_plane_update(state);



	intel_wait_for_vblank_workers(state);



	/* FIXME: We should call drm_atomic_helper_commit_hw_done() here
@@ -7906,6 +7903,8 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) 
		intel_verify_planes(state);



	intel_sagv_post_plane_update(state);

	if (state->modeset)

		intel_set_cdclk_post_plane_update(state);

	intel_pmdemand_post_plane_update(state);



	drm_atomic_helper_commit_hw_done(&state->base);