Commit 6465a8bb authored by Shawn Lin's avatar Shawn Lin Committed by Ulf Hansson
Browse files

mmc: dw_mmc-rockchip: Fix runtime PM support for internal phase support 



RK3576 is the first platform to introduce internal phase support, and
subsequent platforms are expected to adopt a similar design. In this
architecture, runtime suspend powers off the attached power domain, which
resets registers, including vendor-specific ones such as SDMMC_TIMING_CON0,
SDMMC_TIMING_CON1, and SDMMC_MISC_CON. These registers must be saved and
restored, a requirement that falls outside the scope of the dw_mmc core.

Fixes: 59903441 ("mmc: dw_mmc-rockchip: Add internal phase support")
Signed-off-by: default avatarShawn Lin <shawn.lin@rock-chips.com>
Tested-by: default avatarMarco Schirrmeister <mschirrmeister@gmail.com>
Reviewed-by: default avatarHeiko Stuebner <heiko@sntech.de>
Cc: stable@vger.kernel.org
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent af12e64a

drivers/mmc/host/dw_mmc-rockchip.c

+37 −1
Original line number Diff line number Diff line
@@ -36,6 +36,8 @@ struct dw_mci_rockchip_priv_data { 
	int			default_sample_phase;

	int			num_phases;

	bool			internal_phase;

	int                     sample_phase;

	int                     drv_phase;

};



/*
@@ -573,9 +575,43 @@ static void dw_mci_rockchip_remove(struct platform_device *pdev) 
	dw_mci_pltfm_remove(pdev);

}



static int dw_mci_rockchip_runtime_suspend(struct device *dev)

{

	struct platform_device *pdev = to_platform_device(dev);

	struct dw_mci *host = platform_get_drvdata(pdev);

	struct dw_mci_rockchip_priv_data *priv = host->priv;



	if (priv->internal_phase) {

		priv->sample_phase = rockchip_mmc_get_phase(host, true);

		priv->drv_phase = rockchip_mmc_get_phase(host, false);

	}



	return dw_mci_runtime_suspend(dev);

}



static int dw_mci_rockchip_runtime_resume(struct device *dev)

{

	struct platform_device *pdev = to_platform_device(dev);

	struct dw_mci *host = platform_get_drvdata(pdev);

	struct dw_mci_rockchip_priv_data *priv = host->priv;

	int ret;



	ret = dw_mci_runtime_resume(dev);

	if (ret)

		return ret;



	if (priv->internal_phase) {

		rockchip_mmc_set_phase(host, true, priv->sample_phase);

		rockchip_mmc_set_phase(host, false, priv->drv_phase);

		mci_writel(host, MISC_CON, MEM_CLK_AUTOGATE_ENABLE);

	}



	return ret;

}



static const struct dev_pm_ops dw_mci_rockchip_dev_pm_ops = {

	SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)

	RUNTIME_PM_OPS(dw_mci_runtime_suspend, dw_mci_runtime_resume, NULL)

	RUNTIME_PM_OPS(dw_mci_rockchip_runtime_suspend, dw_mci_rockchip_runtime_resume, NULL)

};



static struct platform_driver dw_mci_rockchip_pltfm_driver = {