Commit 64dd3b6a authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'for-linus-non-x86' of git://git.kernel.org/pub/scm/virt/kvm/kvm 

Pull kvm updates from Paolo Bonzini:
 "These are the non-x86 changes (mostly ARM, as is usually the case).
  The generic and x86 changes will come later"

  ARM:

   - New Stage-2 page table dumper, reusing the main ptdump
     infrastructure

   - FP8 support

   - Nested virtualization now supports the address translation
     (FEAT_ATS1A) family of instructions

   - Add selftest checks for a bunch of timer emulation corner cases

   - Fix multiple cases where KVM/arm64 doesn't correctly handle the
     guest trying to use a GICv3 that wasn't advertised

   - Remove REG_HIDDEN_USER from the sysreg infrastructure, making
     things little simpler

   - Prevent MTE tags being restored by userspace if we are actively
     logging writes, as that's a recipe for disaster

   - Correct the refcount on a page that is not considered for MTE tag
     copying (such as a device)

   - When walking a page table to split block mappings, synchronize only
     at the end the walk rather than on every store

   - Fix boundary check when transfering memory using FFA

   - Fix pKVM TLB invalidation, only affecting currently out of tree
     code but worth addressing for peace of mind

  LoongArch:

   - Revert qspinlock to test-and-set simple lock on VM.

   - Add Loongson Binary Translation extension support.

   - Add PMU support for guest.

   - Enable paravirt feature control from VMM.

   - Implement function kvm_para_has_feature().

  RISC-V:

   - Fix sbiret init before forwarding to userspace

   - Don't zero-out PMU snapshot area before freeing data

   - Allow legacy PMU access from guest

   - Fix to allow hpmcounter31 from the guest"

* tag 'for-linus-non-x86' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (64 commits)
  LoongArch: KVM: Implement function kvm_para_has_feature()
  LoongArch: KVM: Enable paravirt feature control from VMM
  LoongArch: KVM: Add PMU support for guest
  KVM: arm64: Get rid of REG_HIDDEN_USER visibility qualifier
  KVM: arm64: Simplify visibility handling of AArch32 SPSR_*
  KVM: arm64: Simplify handling of CNTKCTL_EL12
  LoongArch: KVM: Add vm migration support for LBT registers
  LoongArch: KVM: Add Binary Translation extension support
  LoongArch: KVM: Add VM feature detection function
  LoongArch: Revert qspinlock to test-and-set simple lock on VM
  KVM: arm64: Register ptdump with debugfs on guest creation
  arm64: ptdump: Don't override the level when operating on the stage-2 tables
  arm64: ptdump: Use the ptdump description from a local context
  arm64: ptdump: Expose the attribute parsing functionality
  KVM: arm64: Add memory length checks and remove inline in do_ffa_mem_xfer
  KVM: arm64: Move pagetable definitions to common header
  KVM: arm64: nv: Add support for FEAT_ATS1A
  KVM: arm64: nv: Plumb handling of AT S1* traps from EL2
  KVM: arm64: nv: Make AT+PAN instructions aware of FEAT_PAN3
  KVM: arm64: nv: Sanitise SCTLR_EL1.EPAN according to VM configuration
  ...
parents 980bcd35 0cdcc99e

arch/arm64/include/asm/esr.h

+3 −2
Original line number Diff line number Diff line
@@ -122,8 +122,8 @@ 
#define ESR_ELx_FSC_SECC_TTW(n)	(0x1c + (n))



/* Status codes for individual page table levels */

#define ESR_ELx_FSC_ACCESS_L(n)	(ESR_ELx_FSC_ACCESS + n)

#define ESR_ELx_FSC_PERM_L(n)	(ESR_ELx_FSC_PERM + n)

#define ESR_ELx_FSC_ACCESS_L(n)	(ESR_ELx_FSC_ACCESS + (n))

#define ESR_ELx_FSC_PERM_L(n)	(ESR_ELx_FSC_PERM + (n))



#define ESR_ELx_FSC_FAULT_nL	(0x2C)

#define ESR_ELx_FSC_FAULT_L(n)	(((n) < 0 ? ESR_ELx_FSC_FAULT_nL : \
@@ -161,6 +161,7 @@ 


/* ISS field definitions for exceptions taken in to Hyp */

#define ESR_ELx_FSC_ADDRSZ	(0x00)

#define ESR_ELx_FSC_ADDRSZ_L(n)	(ESR_ELx_FSC_ADDRSZ + (n))

#define ESR_ELx_CV		(UL(1) << 24)

#define ESR_ELx_COND_SHIFT	(20)

#define ESR_ELx_COND_MASK	(UL(0xF) << ESR_ELx_COND_SHIFT)

arch/arm64/include/asm/kvm_arm.h

+1 −0
Original line number Diff line number Diff line
@@ -107,6 +107,7 @@ 
/* TCR_EL2 Registers bits */

#define TCR_EL2_DS		(1UL << 32)

#define TCR_EL2_RES1		((1U << 31) | (1 << 23))

#define TCR_EL2_HPD		(1 << 24)

#define TCR_EL2_TBI		(1 << 20)

#define TCR_EL2_PS_SHIFT	16

#define TCR_EL2_PS_MASK		(7 << TCR_EL2_PS_SHIFT)

arch/arm64/include/asm/kvm_asm.h

+3 −0
Original line number Diff line number Diff line
@@ -236,6 +236,9 @@ extern void __kvm_tlb_flush_vmid(struct kvm_s2_mmu *mmu); 
extern int __kvm_tlbi_s1e2(struct kvm_s2_mmu *mmu, u64 va, u64 sys_encoding);



extern void __kvm_timer_set_cntvoff(u64 cntvoff);

extern void __kvm_at_s1e01(struct kvm_vcpu *vcpu, u32 op, u64 vaddr);

extern void __kvm_at_s1e2(struct kvm_vcpu *vcpu, u32 op, u64 vaddr);

extern void __kvm_at_s12(struct kvm_vcpu *vcpu, u32 op, u64 vaddr);



extern int __kvm_vcpu_run(struct kvm_vcpu *vcpu);

arch/arm64/include/asm/kvm_host.h

+20 −2
Original line number Diff line number Diff line
@@ -448,6 +448,10 @@ enum vcpu_sysreg { 


	POR_EL0,	/* Permission Overlay Register 0 (EL0) */



	/* FP/SIMD/SVE */

	SVCR,

	FPMR,



	/* 32bit specific registers. */

	DACR32_EL2,	/* Domain Access Control Register */

	IFSR32_EL2,	/* Instruction Fault Status Register */
@@ -534,6 +538,8 @@ enum vcpu_sysreg { 
	VNCR(CNTP_CVAL_EL0),

	VNCR(CNTP_CTL_EL0),



	VNCR(ICH_HCR_EL2),



	NR_SYS_REGS	/* Nothing after this line! */

};
@@ -599,6 +605,16 @@ struct kvm_host_data { 
		struct cpu_sve_state *sve_state;

	};



	union {

		/* HYP VA pointer to the host storage for FPMR */

		u64	*fpmr_ptr;

		/*

		 * Used by pKVM only, as it needs to provide storage

		 * for the host

		 */

		u64	fpmr;

	};



	/* Ownership of the FP regs */

	enum {

		FP_STATE_FREE,
@@ -668,8 +684,6 @@ struct kvm_vcpu_arch { 
	void *sve_state;

	enum fp_type fp_type;

	unsigned int sve_max_vl;

	u64 svcr;

	u64 fpmr;



	/* Stage 2 paging state used by the hardware on next switch */

	struct kvm_s2_mmu *hw_mmu;
@@ -1477,4 +1491,8 @@ void kvm_set_vm_id_reg(struct kvm *kvm, u32 reg, u64 val); 
		(pa + pi + pa3) == 1;					\

	})



#define kvm_has_fpmr(k)					\

	(system_supports_fpmr() &&			\

	 kvm_has_feat((k), ID_AA64PFR2_EL1, FPMR, IMP))



#endif /* __ARM64_KVM_HOST_H__ */

arch/arm64/include/asm/kvm_mmu.h

+6 −0
Original line number Diff line number Diff line
@@ -352,5 +352,11 @@ static inline bool kvm_is_nested_s2_mmu(struct kvm *kvm, struct kvm_s2_mmu *mmu) 
	return &kvm->arch.mmu != mmu;

}



#ifdef CONFIG_PTDUMP_STAGE2_DEBUGFS

void kvm_s2_ptdump_create_debugfs(struct kvm *kvm);

#else

static inline void kvm_s2_ptdump_create_debugfs(struct kvm *kvm) {}

#endif /* CONFIG_PTDUMP_STAGE2_DEBUGFS */



#endif /* __ASSEMBLY__ */

#endif /* __ARM64_KVM_MMU_H__ */