Commit 64fd7de2 authored by Karol Kolacinski's avatar Karol Kolacinski Committed by Tony Nguyen
Browse files

ice: PTP: Rename macros used for PHY/QUAD port definitions 



The ice_fill_phy_msg_e822 function uses several macros to specify the
correct address when sending a sideband message to the PHY block in
hardware.

The names of these macros are fairly generic and confusing. Future
development is going to extend the driver to support new hardware families
which have different relationships between PHY and QUAD. Rename the macros
for clarity and to indicate that they are E822 specific. This also matches
closer to the hardware specification in the data sheet.

Signed-off-by: default avatarKarol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: default avatarJacob Keller <jacob.e.keller@intel.com>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
parent be65a1a3

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

+4 −4
Original line number Diff line number Diff line
@@ -294,9 +294,9 @@ ice_fill_phy_msg_e822(struct ice_sbq_msg_input *msg, u8 port, u16 offset) 
{

	int phy_port, phy, quadtype;



	phy_port = port % ICE_PORTS_PER_PHY;

	phy = port / ICE_PORTS_PER_PHY;

	quadtype = (port / ICE_PORTS_PER_QUAD) % ICE_NUM_QUAD_TYPE;

	phy_port = port % ICE_PORTS_PER_PHY_E822;

	phy = port / ICE_PORTS_PER_PHY_E822;

	quadtype = (port / ICE_PORTS_PER_QUAD) % ICE_QUADS_PER_PHY_E822;



	if (quadtype == 0) {

		msg->msg_addr_low = P_Q0_L(P_0_BASE + offset, phy_port);
@@ -628,7 +628,7 @@ ice_fill_quad_msg_e822(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) 


	msg->dest_dev = rmn_0;



	if ((quad % ICE_NUM_QUAD_TYPE) == 0)

	if ((quad % ICE_QUADS_PER_PHY_E822) == 0)

		addr = Q_0_BASE + offset;

	else

		addr = Q_1_BASE + offset;

drivers/net/ethernet/intel/ice/ice_type.h

+7 −7
Original line number Diff line number Diff line
@@ -909,13 +909,13 @@ struct ice_hw { 
	/* INTRL granularity in 1 us */

	u8 intrl_gran;



#define ICE_PHY_PER_NAC		1

#define ICE_PHY_PER_NAC_E822		1

#define ICE_MAX_QUAD			2

#define ICE_NUM_QUAD_TYPE	2

#define ICE_QUADS_PER_PHY_E822		2

#define ICE_PORTS_PER_PHY_E822		8

#define ICE_PORTS_PER_QUAD		4

#define ICE_PHY_0_LAST_QUAD	1

#define ICE_PORTS_PER_PHY	8

#define ICE_NUM_EXTERNAL_PORTS		ICE_PORTS_PER_PHY

#define ICE_PORTS_PER_PHY_E810		4

#define ICE_NUM_EXTERNAL_PORTS		(ICE_MAX_QUAD * ICE_PORTS_PER_QUAD)



	/* Active package version (currently active) */

	struct ice_pkg_ver active_pkg_ver;