Commit 6596118c authored by Jie Gan's avatar Jie Gan Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: Add coresight nodes for SA8775p 



Add following coresight components on SA8775p, TMC/ETF, TPDM,
dynamic Funnel, TPDA and ETM.

Signed-off-by: default avatarJie Gan <quic_jiegan@quicinc.com>
Link: https://lore.kernel.org/r/20240521011946.3148712-2-quic_jiegan@quicinc.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 7ddab80e

arch/arm64/boot/dts/qcom/sa8775p.dtsi

+926 −0
Original line number Diff line number Diff line
@@ -205,6 +205,19 @@ core3 { 
		};

	};



	dummy-sink {

		compatible = "arm,coresight-dummy-sink";



		in-ports {

			port {

				eud_in: endpoint {

					remote-endpoint =

					<&swao_rep_out1>;

				};

			};

		};

	};



	firmware {

		scm {

			compatible = "qcom,scm-sa8775p", "qcom,scm";
@@ -1644,6 +1657,919 @@ ice: crypto@1d88000 { 
			clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;

		};



		stm: stm@4002000 {

			compatible = "arm,coresight-stm", "arm,primecell";

			reg = <0x0 0x4002000 0x0 0x1000>,

				  <0x0 0x16280000 0x0 0x180000>;

			reg-names = "stm-base", "stm-stimulus-base";



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					stm_out: endpoint {

						remote-endpoint =

						<&funnel0_in7>;

					};

				};

			};

		};



		tpdm@4003000 {

			compatible = "qcom,coresight-tpdm", "arm,primecell";

			reg = <0x0 0x4003000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			qcom,cmb-element-bits = <32>;

			qcom,cmb-msrs-num = <32>;



			out-ports {

				port {

					qdss_tpdm0_out: endpoint {

						remote-endpoint =

						<&qdss_tpda_in0>;

					};

				};

			};

		};



		tpda@4004000 {

			compatible = "qcom,coresight-tpda", "arm,primecell";

			reg = <0x0 0x4004000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					qdss_tpda_out: endpoint {

						remote-endpoint =

						<&funnel0_in6>;

					};

				};

			};



			in-ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@0 {

					reg = <0>;

					qdss_tpda_in0: endpoint {

						remote-endpoint =

						<&qdss_tpdm0_out>;

					};

				};



				port@1 {

					reg = <1>;

					qdss_tpda_in1: endpoint {

						remote-endpoint =

						<&qdss_tpdm1_out>;

					};

				};

			};

		};



		tpdm@400f000 {

			compatible = "qcom,coresight-tpdm", "arm,primecell";

			reg = <0x0 0x400f000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			qcom,cmb-element-bits = <32>;

			qcom,cmb-msrs-num = <32>;



			out-ports {

				port {

					qdss_tpdm1_out: endpoint {

						remote-endpoint =

						<&qdss_tpda_in1>;

					};

				};

			};

		};



		funnel@4041000 {

			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";

			reg = <0x0 0x4041000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					funnel0_out: endpoint {

						remote-endpoint =

						<&qdss_funnel_in0>;

					};

				};

			};



			in-ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@6 {

					reg = <6>;

					funnel0_in6: endpoint {

						remote-endpoint =

						<&qdss_tpda_out>;

					};

				};



				port@7 {

					reg = <7>;

					funnel0_in7: endpoint {

						remote-endpoint =

						<&stm_out>;

					};

				};

			};

		};



		funnel@4042000 {

			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";

			reg = <0x0 0x4042000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					funnel1_out: endpoint {

						remote-endpoint =

						<&qdss_funnel_in1>;

					};

				};

			};



			in-ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@4 {

					reg = <4>;

					funnel1_in4: endpoint {

						remote-endpoint =

						<&apss_funnel1_out>;

					};

				};

			};

		};



		funnel@4045000 {

			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";

			reg = <0x0 0x4045000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					qdss_funnel_out: endpoint {

						remote-endpoint =

						<&aoss_funnel_in7>;

					};

				};

			};



			in-ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@0 {

					reg = <0>;

					qdss_funnel_in0: endpoint {

						remote-endpoint =

						<&funnel0_out>;

					};

				};



				port@1 {

					reg = <1>;

					qdss_funnel_in1: endpoint {

						remote-endpoint =

						<&funnel1_out>;

					};

				};

			};

		};



		funnel@4b04000 {

			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";

			reg = <0x0 0x4b04000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					aoss_funnel_out: endpoint {

						remote-endpoint =

						<&etf0_in>;

					};

				};

			};



			in-ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@6 {

					reg = <6>;

					aoss_funnel_in6: endpoint {

						remote-endpoint =

						<&aoss_tpda_out>;

					};

				};



				port@7 {

					reg = <7>;

					aoss_funnel_in7: endpoint {

						remote-endpoint =

						<&qdss_funnel_out>;

					};

				};

			};

		};



		tmc_etf: tmc@4b05000 {

			compatible = "arm,coresight-tmc", "arm,primecell";

			reg = <0x0 0x4b05000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					etf0_out: endpoint {

						remote-endpoint =

						<&swao_rep_in>;

					};

				};

			};



			in-ports {

				port {

					etf0_in: endpoint {

						remote-endpoint =

						<&aoss_funnel_out>;

					};

				};

			};

		};



		replicator@4b06000 {

			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";

			reg = <0x0 0x4b06000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@1 {

					reg = <1>;

					swao_rep_out1: endpoint {

						remote-endpoint =

						<&eud_in>;

					};

				};

			};



			in-ports {

				port {

					swao_rep_in: endpoint {

						remote-endpoint =

						<&etf0_out>;

					};

				};

			};

		};



		tpda@4b08000 {

			compatible = "qcom,coresight-tpda", "arm,primecell";

			reg = <0x0 0x4b08000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					aoss_tpda_out: endpoint {

						remote-endpoint =

						<&aoss_funnel_in6>;

					};

				};

			};



			in-ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@0 {

					reg = <0>;

					aoss_tpda_in0: endpoint {

						remote-endpoint =

						<&aoss_tpdm0_out>;

					};

				};



				port@1 {

					reg = <1>;

					aoss_tpda_in1: endpoint {

						remote-endpoint =

						<&aoss_tpdm1_out>;

					};

				};



				port@2 {

					reg = <2>;

					aoss_tpda_in2: endpoint {

						remote-endpoint =

						<&aoss_tpdm2_out>;

					};

				};



				port@3 {

					reg = <3>;

					aoss_tpda_in3: endpoint {

						remote-endpoint =

						<&aoss_tpdm3_out>;

					};

				};



				port@4 {

					reg = <4>;

					aoss_tpda_in4: endpoint {

						remote-endpoint =

						<&aoss_tpdm4_out>;

					};

				};

			};

		};



		tpdm@4b09000 {

			compatible = "qcom,coresight-tpdm", "arm,primecell";

			reg = <0x0 0x4b09000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			qcom,cmb-element-bits = <64>;

			qcom,cmb-msrs-num = <32>;



			out-ports {

				port {

					aoss_tpdm0_out: endpoint {

						remote-endpoint =

						<&aoss_tpda_in0>;

					};

				};

			};

		};



		tpdm@4b0a000 {

			compatible = "qcom,coresight-tpdm", "arm,primecell";

			reg = <0x0 0x4b0a000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			qcom,cmb-element-bits = <64>;

			qcom,cmb-msrs-num = <32>;



			out-ports {

				port {

					aoss_tpdm1_out: endpoint {

						remote-endpoint =

						<&aoss_tpda_in1>;

					};

				};

			};

		};



		tpdm@4b0b000 {

			compatible = "qcom,coresight-tpdm", "arm,primecell";

			reg = <0x0 0x4b0b000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			qcom,cmb-element-bits = <64>;

			qcom,cmb-msrs-num = <32>;



			out-ports {

				port {

					aoss_tpdm2_out: endpoint {

						remote-endpoint =

						<&aoss_tpda_in2>;

					};

				};

			};

		};



		tpdm@4b0c000 {

			compatible = "qcom,coresight-tpdm", "arm,primecell";

			reg = <0x0 0x4b0c000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			qcom,cmb-element-bits = <64>;

			qcom,cmb-msrs-num = <32>;



			out-ports {

				port {

					aoss_tpdm3_out: endpoint {

						remote-endpoint =

						<&aoss_tpda_in3>;

					};

				};

			};

		};



		tpdm@4b0d000 {

			compatible = "qcom,coresight-tpdm", "arm,primecell";

			reg = <0x0 0x4b0d000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			qcom,dsb-element-bits = <32>;

			qcom,dsb-msrs-num = <32>;



			out-ports {

				port {

					aoss_tpdm4_out: endpoint {

						remote-endpoint =

						<&aoss_tpda_in4>;

					};

				};

			};

		};



		aoss_cti: cti@4b13000 {

			compatible = "arm,coresight-cti", "arm,primecell";

			reg = <0x0 0x4b13000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

		};



		etm@6040000 {

			compatible = "arm,primecell";

			reg = <0x0 0x6040000 0x0 0x1000>;

			cpu = <&CPU0>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

			arm,coresight-loses-context-with-cpu;

			qcom,skip-power-up;



			out-ports {

				port {

					etm0_out: endpoint {

						remote-endpoint =

						<&apss_funnel0_in0>;

					};

				};

			};

		};



		etm@6140000 {

			compatible = "arm,primecell";

			reg = <0x0 0x6140000 0x0 0x1000>;

			cpu = <&CPU1>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

			arm,coresight-loses-context-with-cpu;

			qcom,skip-power-up;



			out-ports {

				port {

					etm1_out: endpoint {

						remote-endpoint =

						<&apss_funnel0_in1>;

					};

				};

			};

		};



		etm@6240000 {

			compatible = "arm,primecell";

			reg = <0x0 0x6240000 0x0 0x1000>;

			cpu = <&CPU2>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

			arm,coresight-loses-context-with-cpu;

			qcom,skip-power-up;



			out-ports {

				port {

					etm2_out: endpoint {

						remote-endpoint =

						<&apss_funnel0_in2>;

					};

				};

			};

		};



		etm@6340000 {

			compatible = "arm,primecell";

			reg = <0x0 0x6340000 0x0 0x1000>;

			cpu = <&CPU3>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

			arm,coresight-loses-context-with-cpu;

			qcom,skip-power-up;



			out-ports {

				port {

					etm3_out: endpoint {

						remote-endpoint =

						<&apss_funnel0_in3>;

					};

				};

			};

		};



		etm@6440000 {

			compatible = "arm,primecell";

			reg = <0x0 0x6440000 0x0 0x1000>;

			cpu = <&CPU4>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

			arm,coresight-loses-context-with-cpu;

			qcom,skip-power-up;



			out-ports {

				port {

					etm4_out: endpoint {

						remote-endpoint =

						<&apss_funnel0_in4>;

					};

				};

			};

		};



		etm@6540000 {

			compatible = "arm,primecell";

			reg = <0x0 0x6540000 0x0 0x1000>;

			cpu = <&CPU5>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

			arm,coresight-loses-context-with-cpu;

			qcom,skip-power-up;



			out-ports {

				port {

					etm5_out: endpoint {

						remote-endpoint =

						<&apss_funnel0_in5>;

					};

				};

			};

		};



		etm@6640000 {

			compatible = "arm,primecell";

			reg = <0x0 0x6640000 0x0 0x1000>;

			cpu = <&CPU6>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

			arm,coresight-loses-context-with-cpu;

			qcom,skip-power-up;



			out-ports {

				port {

					etm6_out: endpoint {

						remote-endpoint =

						<&apss_funnel0_in6>;

					};

				};

			};

		};



		etm@6740000 {

			compatible = "arm,primecell";

			reg = <0x0 0x6740000 0x0 0x1000>;

			cpu = <&CPU7>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

			arm,coresight-loses-context-with-cpu;

			qcom,skip-power-up;



			out-ports {

				port {

					etm7_out: endpoint {

						remote-endpoint =

						<&apss_funnel0_in7>;

					};

				};

			};

		};



		funnel@6800000 {

			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";

			reg = <0x0 0x6800000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					apss_funnel0_out: endpoint {

						remote-endpoint =

						<&apss_funnel1_in0>;

					};

				};

			};



			in-ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@0 {

					reg = <0>;

					apss_funnel0_in0: endpoint {

						remote-endpoint =

						<&etm0_out>;

					};

				};



				port@1 {

					reg = <1>;

					apss_funnel0_in1: endpoint {

						remote-endpoint =

						<&etm1_out>;

					};

				};



				port@2 {

					reg = <2>;

					apss_funnel0_in2: endpoint {

						remote-endpoint =

						<&etm2_out>;

					};

				};



				port@3 {

					reg = <3>;

					apss_funnel0_in3: endpoint {

						remote-endpoint =

						<&etm3_out>;

					};

				};



				port@4 {

					reg = <4>;

					apss_funnel0_in4: endpoint {

						remote-endpoint =

						<&etm4_out>;

					};

				};



				port@5 {

					reg = <5>;

					apss_funnel0_in5: endpoint {

						remote-endpoint =

						<&etm5_out>;

					};

				};



				port@6 {

					reg = <6>;

					apss_funnel0_in6: endpoint {

						remote-endpoint =

						<&etm6_out>;

					};

				};



				port@7 {

					reg = <7>;

					apss_funnel0_in7: endpoint {

						remote-endpoint =

						<&etm7_out>;

					};

				};

			};

		};



		funnel@6810000 {

			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";

			reg = <0x0 0x6810000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					apss_funnel1_out: endpoint {

						remote-endpoint =

						<&funnel1_in4>;

					};

				};

			};



			in-ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@0 {

					reg = <0>;

					apss_funnel1_in0: endpoint {

						remote-endpoint =

						<&apss_funnel0_out>;

					};

				};



				port@3 {

					reg = <3>;

					apss_funnel1_in3: endpoint {

						remote-endpoint =

						<&apss_tpda_out>;

					};

				};

			};

		};



		tpdm@6860000 {

			compatible = "qcom,coresight-tpdm", "arm,primecell";

			reg = <0x0 0x6860000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			qcom,cmb-element-bits = <64>;

			qcom,cmb-msrs-num = <32>;



			out-ports {

				port {

					apss_tpdm3_out: endpoint {

						remote-endpoint =

						<&apss_tpda_in3>;

					};

				};

			};

		};



		tpdm@6861000 {

			compatible = "qcom,coresight-tpdm", "arm,primecell";

			reg = <0x0 0x6861000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			qcom,dsb-element-bits = <32>;

			qcom,dsb-msrs-num = <32>;



			out-ports {

				port {

					apss_tpdm4_out: endpoint {

						remote-endpoint =

						<&apss_tpda_in4>;

					};

				};

			};

		};



		tpda@6863000 {

			compatible = "qcom,coresight-tpda", "arm,primecell";

			reg = <0x0 0x6863000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					apss_tpda_out: endpoint {

						remote-endpoint =

						<&apss_funnel1_in3>;

					};

				};

			};



			in-ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@0 {

					reg = <0>;

					apss_tpda_in0: endpoint {

						remote-endpoint =

						<&apss_tpdm0_out>;

					};

				};



				port@1 {

					reg = <1>;

					apss_tpda_in1: endpoint {

						remote-endpoint =

						<&apss_tpdm1_out>;

					};

				};



				port@2 {

					reg = <2>;

					apss_tpda_in2: endpoint {

						remote-endpoint =

						<&apss_tpdm2_out>;

					};

				};



				port@3 {

					reg = <3>;

					apss_tpda_in3: endpoint {

						remote-endpoint =

						<&apss_tpdm3_out>;

					};

				};



				port@4 {

					reg = <4>;

					apss_tpda_in4: endpoint {

						remote-endpoint =

						<&apss_tpdm4_out>;

					};

				};

			};

		};



		tpdm@68a0000 {

			compatible = "qcom,coresight-tpdm", "arm,primecell";

			reg = <0x0 0x68a0000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			qcom,cmb-element-bits = <32>;

			qcom,cmb-msrs-num = <32>;



			out-ports {

				port {

					apss_tpdm0_out: endpoint {

						remote-endpoint =

						<&apss_tpda_in0>;

					};

				};

			};

		};



		tpdm@68b0000 {

			compatible = "qcom,coresight-tpdm", "arm,primecell";

			reg = <0x0 0x68b0000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			qcom,cmb-element-bits = <32>;

			qcom,cmb-msrs-num = <32>;



			out-ports {

				port {

					apss_tpdm1_out: endpoint {

						remote-endpoint =

						<&apss_tpda_in1>;

					};

				};

			};

		};



		tpdm@68c0000 {

			compatible = "qcom,coresight-tpdm", "arm,primecell";

			reg = <0x0 0x68c0000 0x0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			qcom,dsb-element-bits = <32>;

			qcom,dsb-msrs-num = <32>;



			out-ports {

				port {

					apss_tpdm2_out: endpoint {

						remote-endpoint =

						<&apss_tpda_in2>;

					};

				};

			};

		};



		usb_0_hsphy: phy@88e4000 {

			compatible = "qcom,sa8775p-usb-hs-phy",

				     "qcom,usb-snps-hs-5nm-phy";