Commit 65d00e37 authored Jan 23, 2026 by Marc Zyngier

KVM: arm64: Simplify PAGE_S2_MEMATTR



Restore PAGE_S2_MEMATTR() to its former glory, keeping the use of
FWB as an implementation detail.

Reviewed-by: Joey Gouly <joey.gouly@arm.com>
Reviewed-by: Fuad Tabba <tabba@google.com>
Tested-by: Fuad Tabba <tabba@google.com>
Link: https://patch.msgid.link/20260123191637.715429-6-maz@kernel.org


Signed-off-by: Marc Zyngier <maz@kernel.org>

parent 4f27fe82

arch/arm64/include/asm/pgtable-prot.h

+2 −2

Original line number	Diff line number	Diff line
		@@ -109,10 +109,10 @@ static inline bool __pure lpa2_is_enabled(void)
		#define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL_EXEC)
		#define PAGE_KERNEL_EXEC_CONT __pgprot(_PAGE_KERNEL_EXEC_CONT)

		#define PAGE_S2_MEMATTR(attr, has_fwb) \
		#define PAGE_S2_MEMATTR(attr) \
		({ \
		u64 __val; \
		if (has_fwb) \
		if (cpus_have_final_cap(ARM64_HAS_STAGE2_FWB)) \
		__val = PTE_S2_MEMATTR(MT_S2_FWB_ ## attr); \
		else \
		__val = PTE_S2_MEMATTR(MT_S2_ ## attr); \

arch/arm64/kvm/hyp/pgtable.c

+2 −3

Original line number	Diff line number	Diff line
		@@ -653,13 +653,12 @@ void kvm_tlb_flush_vmid_range(struct kvm_s2_mmu *mmu,

		#define KVM_S2_MEMATTR(pgt, attr) \
		({ \
		bool __fwb = cpus_have_final_cap(ARM64_HAS_STAGE2_FWB); \
		kvm_pte_t __attr; \
		\
		if ((pgt)->flags & KVM_PGTABLE_S2_AS_S1) \
		__attr = PAGE_S2_MEMATTR(AS_S1, __fwb); \
		__attr = PAGE_S2_MEMATTR(AS_S1); \
		else \
		__attr = PAGE_S2_MEMATTR(attr, __fwb); \
		__attr = PAGE_S2_MEMATTR(attr); \
		\
		__attr; \
		})