Commit 65ed0b33 authored by Jes Sorensen's avatar Jes Sorensen Committed by Linus Torvalds
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[PATCH] SN2 XPC build patches



This patch contains the bits to make the XPC code use the uncached
allocator rather than calling into the mspec driver.  It also includes the
mspec.h header which is required to build the XPC modules.

Signed-off-by: default avatarJes Sorensen <jes@wildopensource.com>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent f14f75b8
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+1 −1
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@@ -227,7 +227,7 @@ config IA64_SGI_SN_SIM

config IA64_SGI_SN_XP
	tristate "Support communication between SGI SSIs"
	depends on MSPEC
	select IA64_UNCACHED_ALLOCATOR
	help
	  An SGI machine can be divided into multiple Single System
	  Images which act independently of each other and have
+4 −2
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@
#include <linux/cache.h>
#include <linux/mmzone.h>
#include <linux/nodemask.h>
#include <asm/uncached.h>
#include <asm/sn/bte.h>
#include <asm/sn/intr.h>
#include <asm/sn/sn_sal.h>
@@ -183,7 +184,7 @@ xpc_rsvd_page_init(void)
	 * memory protections are never restricted.
	 */
	if ((amos_page = xpc_vars->amos_page) == NULL) {
		amos_page = (AMO_t *) mspec_kalloc_page(0);
		amos_page = (AMO_t *) TO_AMO(uncached_alloc_page(0));
		if (amos_page == NULL) {
			dev_err(xpc_part, "can't allocate page of AMOs\n");
			return NULL;
@@ -200,7 +201,8 @@ xpc_rsvd_page_init(void)
			if (ret != 0) {
				dev_err(xpc_part, "can't change memory "
					"protections\n");
				mspec_kfree_page((unsigned long) amos_page);
				uncached_free_page(__IA64_UNCACHED_OFFSET |
						   TO_PHYS((u64) amos_page));
				return NULL;
			}
		}
+59 −0
Original line number Diff line number Diff line
/*
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (c) 2001-2004 Silicon Graphics, Inc.  All rights reserved.
 */

#ifndef _ASM_IA64_SN_MSPEC_H
#define _ASM_IA64_SN_MSPEC_H

#define FETCHOP_VAR_SIZE 64 /* 64 byte per fetchop variable */

#define FETCHOP_LOAD		0
#define FETCHOP_INCREMENT	8
#define FETCHOP_DECREMENT	16
#define FETCHOP_CLEAR		24

#define FETCHOP_STORE		0
#define FETCHOP_AND		24
#define FETCHOP_OR		32

#define FETCHOP_CLEAR_CACHE	56

#define FETCHOP_LOAD_OP(addr, op) ( \
         *(volatile long *)((char*) (addr) + (op)))

#define FETCHOP_STORE_OP(addr, op, x) ( \
         *(volatile long *)((char*) (addr) + (op)) = (long) (x))

#ifdef __KERNEL__

/*
 * Each Atomic Memory Operation (AMO formerly known as fetchop)
 * variable is 64 bytes long.  The first 8 bytes are used.  The
 * remaining 56 bytes are unaddressable due to the operation taking
 * that portion of the address.
 *
 * NOTE: The AMO_t _MUST_ be placed in either the first or second half
 * of the cache line.  The cache line _MUST NOT_ be used for anything
 * other than additional AMO_t entries.  This is because there are two
 * addresses which reference the same physical cache line.  One will
 * be a cached entry with the memory type bits all set.  This address
 * may be loaded into processor cache.  The AMO_t will be referenced
 * uncached via the memory special memory type.  If any portion of the
 * cached cache-line is modified, when that line is flushed, it will
 * overwrite the uncached value in physical memory and lead to
 * inconsistency.
 */
typedef struct {
        u64 variable;
        u64 unused[7];
} AMO_t;


#endif /* __KERNEL__ */

#endif /* _ASM_IA64_SN_MSPEC_H */