Commit 664988eb authored by Jerome Brunet's avatar Jerome Brunet
Browse files

clk: amlogic: axg-audio: use the auxiliary reset driver 



Remove the implementation of the reset driver in axg audio
clock driver and migrate to the one provided by the reset framework
on the auxiliary bus

Reviewed-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241008-meson-clk-rst-aux-v2-1-682ab9151f4f@baylibre.com


Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
parent 0e2d3725

drivers/clk/meson/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -106,6 +106,7 @@ config COMMON_CLK_AXG_AUDIO 
	select COMMON_CLK_MESON_SCLK_DIV

	select COMMON_CLK_MESON_CLKC_UTILS

	select REGMAP_MMIO

	imply RESET_MESON_AUX

	help

	  Support for the audio clock controller on AmLogic A113D devices,

	  aka axg, Say Y if you want audio subsystem to work.

drivers/clk/meson/axg-audio.c

+9 −100
Original line number Diff line number Diff line
@@ -15,6 +15,8 @@ 
#include <linux/reset-controller.h>

#include <linux/slab.h>



#include <soc/amlogic/reset-meson-aux.h>



#include "meson-clkc-utils.h"

#include "axg-audio.h"

#include "clk-regmap.h"
@@ -1678,84 +1680,6 @@ static struct clk_regmap *const sm1_clk_regmaps[] = { 
	&sm1_earcrx_dmac_clk,

};



struct axg_audio_reset_data {

	struct reset_controller_dev rstc;

	struct regmap *map;

	unsigned int offset;

};



static void axg_audio_reset_reg_and_bit(struct axg_audio_reset_data *rst,

					unsigned long id,

					unsigned int *reg,

					unsigned int *bit)

{

	unsigned int stride = regmap_get_reg_stride(rst->map);



	*reg = (id / (stride * BITS_PER_BYTE)) * stride;

	*reg += rst->offset;

	*bit = id % (stride * BITS_PER_BYTE);

}



static int axg_audio_reset_update(struct reset_controller_dev *rcdev,

				unsigned long id, bool assert)

{

	struct axg_audio_reset_data *rst =

		container_of(rcdev, struct axg_audio_reset_data, rstc);

	unsigned int offset, bit;



	axg_audio_reset_reg_and_bit(rst, id, &offset, &bit);



	regmap_update_bits(rst->map, offset, BIT(bit),

			assert ? BIT(bit) : 0);



	return 0;

}



static int axg_audio_reset_status(struct reset_controller_dev *rcdev,

				unsigned long id)

{

	struct axg_audio_reset_data *rst =

		container_of(rcdev, struct axg_audio_reset_data, rstc);

	unsigned int val, offset, bit;



	axg_audio_reset_reg_and_bit(rst, id, &offset, &bit);



	regmap_read(rst->map, offset, &val);



	return !!(val & BIT(bit));

}



static int axg_audio_reset_assert(struct reset_controller_dev *rcdev,

				unsigned long id)

{

	return axg_audio_reset_update(rcdev, id, true);

}



static int axg_audio_reset_deassert(struct reset_controller_dev *rcdev,

				unsigned long id)

{

	return axg_audio_reset_update(rcdev, id, false);

}



static int axg_audio_reset_toggle(struct reset_controller_dev *rcdev,

				unsigned long id)

{

	int ret;



	ret = axg_audio_reset_assert(rcdev, id);

	if (ret)

		return ret;



	return axg_audio_reset_deassert(rcdev, id);

}



static const struct reset_control_ops axg_audio_rstc_ops = {

	.assert = axg_audio_reset_assert,

	.deassert = axg_audio_reset_deassert,

	.reset = axg_audio_reset_toggle,

	.status = axg_audio_reset_status,

};



static struct regmap_config axg_audio_regmap_cfg = {

	.reg_bits	= 32,

	.val_bits	= 32,
@@ -1766,16 +1690,14 @@ struct audioclk_data { 
	struct clk_regmap *const *regmap_clks;

	unsigned int regmap_clk_num;

	struct meson_clk_hw_data hw_clks;

	unsigned int reset_offset;

	unsigned int reset_num;

	unsigned int max_register;

	const char *rst_drvname;

};



static int axg_audio_clkc_probe(struct platform_device *pdev)

{

	struct device *dev = &pdev->dev;

	const struct audioclk_data *data;

	struct axg_audio_reset_data *rst;

	struct regmap *map;

	void __iomem *regs;

	struct clk_hw *hw;
@@ -1834,22 +1756,11 @@ static int axg_audio_clkc_probe(struct platform_device *pdev) 
	if (ret)

		return ret;



	/* Stop here if there is no reset */

	if (!data->reset_num)

		return 0;



	rst = devm_kzalloc(dev, sizeof(*rst), GFP_KERNEL);

	if (!rst)

		return -ENOMEM;

	/* Register auxiliary reset driver when applicable */

	if (data->rst_drvname)

		ret = devm_meson_rst_aux_register(dev, map, data->rst_drvname);



	rst->map = map;

	rst->offset = data->reset_offset;

	rst->rstc.nr_resets = data->reset_num;

	rst->rstc.ops = &axg_audio_rstc_ops;

	rst->rstc.of_node = dev->of_node;

	rst->rstc.owner = THIS_MODULE;



	return devm_reset_controller_register(dev, &rst->rstc);

	return ret;

}



static const struct audioclk_data axg_audioclk_data = {
@@ -1869,9 +1780,8 @@ static const struct audioclk_data g12a_audioclk_data = { 
		.hws = g12a_audio_hw_clks,

		.num = ARRAY_SIZE(g12a_audio_hw_clks),

	},

	.reset_offset = AUDIO_SW_RESET,

	.reset_num = 26,

	.max_register = AUDIO_CLK_SPDIFOUT_B_CTRL,

	.rst_drvname = "rst-g12a",

};



static const struct audioclk_data sm1_audioclk_data = {
@@ -1881,9 +1791,8 @@ static const struct audioclk_data sm1_audioclk_data = { 
		.hws = sm1_audio_hw_clks,

		.num = ARRAY_SIZE(sm1_audio_hw_clks),

	},

	.reset_offset = AUDIO_SM1_SW_RESET0,

	.reset_num = 39,

	.max_register = AUDIO_EARCRX_DMAC_CLK_CTRL,

	.rst_drvname = "rst-sm1",

};



static const struct of_device_id clkc_match_table[] = {