Commit 66984536 authored by Yeoreum Yun's avatar Yeoreum Yun Committed by Catalin Marinas
Browse files

arm64/cpufeature: Add FEAT_MTE_TAGGED_FAR feature 



Add FEAT_MTE_TAGGED_FAR cpucap which makes FAR_ELx report
all non-address bits on a synchronous MTE tag check fault since Armv8.9

Signed-off-by: default avatarYeoreum Yun <yeoreum.yun@arm.com>
Acked-by: default avatarYury Khrustalev <yury.khrustalev@arm.com>
Link: https://lore.kernel.org/r/20250618084513.1761345-2-yeoreum.yun@arm.com


Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 19272b37

arch/arm64/kernel/cpufeature.c

+8 −0
Original line number Diff line number Diff line
@@ -320,6 +320,7 @@ static const struct arm64_ftr_bits ftr_id_aa64pfr1[] = { 


static const struct arm64_ftr_bits ftr_id_aa64pfr2[] = {

	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR2_EL1_FPMR_SHIFT, 4, 0),

	ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR2_EL1_MTEFAR_SHIFT, 4, ID_AA64PFR2_EL1_MTEFAR_NI),

	ARM64_FTR_END,

};
@@ -2874,6 +2875,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = { 
		.matches = has_cpuid_feature,

		ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, MTE, MTE3)

	},

	{

		.desc = "FAR on MTE Tag Check Fault",

		.capability = ARM64_MTE_FAR,

		.type = ARM64_CPUCAP_SYSTEM_FEATURE,

		.matches = has_cpuid_feature,

		ARM64_CPUID_FIELDS(ID_AA64PFR2_EL1, MTEFAR, IMP)

	},

#endif /* CONFIG_ARM64_MTE */

	{

		.desc = "RCpc load-acquire (LDAPR)",

arch/arm64/tools/cpucaps

+1 −0
Original line number Diff line number Diff line
@@ -68,6 +68,7 @@ MPAM 
MPAM_HCR

MTE

MTE_ASYMM

MTE_FAR

SME

SME_FA64

SME2