Unverified Commit 66bbb329 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-fixes-6.4' of...

Merge tag 'imx-fixes-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 6.4:

- A couple of i.MX8MN/P video clock changes from Adam Ford to fix issue
  with clock re-parenting.
- Add missing pvcie-supply regulator for imx6qdl-mba6 board.
- A series of colibri-imx8x board fixes on pin configuration.
- Set and limit the mode for PMIC bucks for imx6ull-dhcor board to fix
  stability problems.
- A couple of changes from Frank Li to correct cdns,usb3 bindings
  cdns,on-chip-buff-size property and fix USB 3.0 gadget failure on
  i.MX8QM & QXPB0.
- Add a required PHY deassert delay for imx8mn-var-som board to fix PHY
  detection failure.

* tag 'imx-fixes-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: imx8: fix USB 3.0 Gadget Failure in QM & QXPB0 at super speed
  dt-binding: cdns,usb3: Fix cdns,on-chip-buff-size type
  arm64: dts: colibri-imx8x: delete adc1 and dsp
  arm64: dts: colibri-imx8x: fix iris pinctrl configuration
  arm64: dts: colibri-imx8x: move pinctrl property from SoM to eval board
  arm64: dts: colibri-imx8x: fix eval board pin configuration
  arm64: dts: imx8mp: Fix video clock parents
  ARM: dts: imx6qdl-mba6: Add missing pvcie-supply regulator
  ARM: dts: imx6ull-dhcor: Set and limit the mode for PMIC buck 1, 2 and 3
  arm64: dts: imx8mn-var-som: fix PHY detection bug by adding deassert delay
  arm64: dts: imx8mn: Fix video clock parents

Link: https://lore.kernel.org/r/20230516133625.GI767028@dragon


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 0bfa36f9 0f554e37
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+1 −1
Original line number Diff line number Diff line
@@ -64,7 +64,7 @@ properties:
    description:
      size of memory intended as internal memory for endpoints
      buffers expressed in KB
    $ref: /schemas/types.yaml#/definitions/uint32
    $ref: /schemas/types.yaml#/definitions/uint16

  cdns,phyrst-a-enable:
    description: Enable resetting of PHY if Rx fail is detected
+1 −0
Original line number Diff line number Diff line
@@ -209,6 +209,7 @@ &pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio6 7 GPIO_ACTIVE_LOW>;
	vpcie-supply = <&reg_pcie>;
	status = "okay";
};

+7 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/regulator/dlg,da9063-regulator.h>
#include "imx6ull.dtsi"

/ {
@@ -84,16 +85,20 @@ onkey {

		regulators {
			vdd_soc_in_1v4: buck1 {
				regulator-allowed-modes = <DA9063_BUCK_MODE_SLEEP>; /* PFM */
				regulator-always-on;
				regulator-boot-on;
				regulator-initial-mode = <DA9063_BUCK_MODE_SLEEP>;
				regulator-max-microvolt = <1400000>;
				regulator-min-microvolt = <1400000>;
				regulator-name = "vdd_soc_in_1v4";
			};

			vcc_3v3: buck2 {
				regulator-allowed-modes = <DA9063_BUCK_MODE_SYNC>; /* PWM */
				regulator-always-on;
				regulator-boot-on;
				regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>;
				regulator-max-microvolt = <3300000>;
				regulator-min-microvolt = <3300000>;
				regulator-name = "vcc_3v3";
@@ -106,8 +111,10 @@ vcc_3v3: buck2 {
			 * the voltage is set to 1.5V.
			 */
			vcc_ddr_1v35: buck3 {
				regulator-allowed-modes = <DA9063_BUCK_MODE_SYNC>; /* PWM */
				regulator-always-on;
				regulator-boot-on;
				regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>;
				regulator-max-microvolt = <1500000>;
				regulator-min-microvolt = <1500000>;
				regulator-name = "vcc_ddr_1v35";
+1 −0
Original line number Diff line number Diff line
@@ -171,6 +171,7 @@ usbotg3_cdns3: usb@5b120000 {
			interrupt-names = "host", "peripheral", "otg", "wakeup";
			phys = <&usb3_phy>;
			phy-names = "cdns3,usb3-phy";
			cdns,on-chip-buff-size = /bits/ 16 <18>;
			status = "disabled";
		};
	};
+7 −1
Original line number Diff line number Diff line
@@ -98,11 +98,17 @@ mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy: ethernet-phy@4 {
		ethphy: ethernet-phy@4 { /* AR8033 or ADIN1300 */
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <4>;
			reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
			reset-assert-us = <10000>;
			/*
			 * Deassert delay:
			 * ADIN1300 requires 5ms.
			 * AR8033   requires 1ms.
			 */
			reset-deassert-us = <20000>;
		};
	};
};
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