Commit 66d4709a authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-6.13-2025-01-09' of... 

Merge tag 'amd-drm-fixes-6.13-2025-01-09' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-fixes

amd-drm-fixes-6.13-2025-01-09:

amdgpu:
- Display interrupt fixes
- Fix display max surface mismatches
- Fix divide error in DM plane scale calcs
- Display divide by 0 checks in dml helpers
- SMU 13 AD/DC interrrupt handling fix
- Fix locking around buddy trim handling

amdkfd:
- Fix page fault with shader debugger enabled
- Fix eviction fence wq handling

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250109164236.477295-1-alexander.deucher@amd.com
parents 7ac9f336 75c8b703

drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c

+1 −1
Original line number Diff line number Diff line
@@ -567,7 +567,6 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man, 
		else

			remaining_size -= size;

	}

	mutex_unlock(&mgr->lock);



	if (bo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS && adjust_dcc_size) {

		struct drm_buddy_block *dcc_block;
@@ -584,6 +583,7 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man, 
				     (u64)vres->base.size,

				     &vres->blocks);

	}

	mutex_unlock(&mgr->lock);



	vres->base.start = 0;

	size = max_t(u64, amdgpu_vram_mgr_blocks_size(&vres->blocks),

drivers/gpu/drm/amd/amdkfd/kfd_debug.c

+17 −0
Original line number Diff line number Diff line
@@ -350,10 +350,27 @@ int kfd_dbg_set_mes_debug_mode(struct kfd_process_device *pdd, bool sq_trap_en) 
{

	uint32_t spi_dbg_cntl = pdd->spi_dbg_override | pdd->spi_dbg_launch_mode;

	uint32_t flags = pdd->process->dbg_flags;

	struct amdgpu_device *adev = pdd->dev->adev;

	int r;



	if (!kfd_dbg_is_per_vmid_supported(pdd->dev))

		return 0;



	if (!pdd->proc_ctx_cpu_ptr) {

			r = amdgpu_amdkfd_alloc_gtt_mem(adev,

				AMDGPU_MES_PROC_CTX_SIZE,

				&pdd->proc_ctx_bo,

				&pdd->proc_ctx_gpu_addr,

				&pdd->proc_ctx_cpu_ptr,

				false);

		if (r) {

			dev_err(adev->dev,

			"failed to allocate process context bo\n");

			return r;

		}

		memset(pdd->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE);

	}



	return amdgpu_mes_set_shader_debugger(pdd->dev->adev, pdd->proc_ctx_gpu_addr, spi_dbg_cntl,

						pdd->watch_points, flags, sq_trap_en);

}

drivers/gpu/drm/amd/amdkfd/kfd_process.c

+2 −1
Original line number Diff line number Diff line
@@ -1160,6 +1160,7 @@ static void kfd_process_wq_release(struct work_struct *work) 
	 */

	synchronize_rcu();

	ef = rcu_access_pointer(p->ef);

	if (ef)

		dma_fence_signal(ef);



	kfd_process_remove_sysfs(p);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+2 −33
Original line number Diff line number Diff line
@@ -8400,16 +8400,6 @@ static void manage_dm_interrupts(struct amdgpu_device *adev, 
				 struct amdgpu_crtc *acrtc,

				 struct dm_crtc_state *acrtc_state)

{

	/*

	 * We have no guarantee that the frontend index maps to the same

	 * backend index - some even map to more than one.

	 *

	 * TODO: Use a different interrupt or check DC itself for the mapping.

	 */

	int irq_type =

		amdgpu_display_crtc_idx_to_irq_type(

			adev,

			acrtc->crtc_id);

	struct drm_vblank_crtc_config config = {0};

	struct dc_crtc_timing *timing;

	int offdelay;
@@ -8435,28 +8425,7 @@ static void manage_dm_interrupts(struct amdgpu_device *adev, 


		drm_crtc_vblank_on_config(&acrtc->base,

					  &config);



		amdgpu_irq_get(

			adev,

			&adev->pageflip_irq,

			irq_type);

#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)

		amdgpu_irq_get(

			adev,

			&adev->vline0_irq,

			irq_type);

#endif

	} else {

#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)

		amdgpu_irq_put(

			adev,

			&adev->vline0_irq,

			irq_type);

#endif

		amdgpu_irq_put(

			adev,

			&adev->pageflip_irq,

			irq_type);

		drm_crtc_vblank_off(&acrtc->base);

	}

}
@@ -11155,8 +11124,8 @@ dm_get_plane_scale(struct drm_plane_state *plane_state, 
	int plane_src_w, plane_src_h;



	dm_get_oriented_plane_size(plane_state, &plane_src_w, &plane_src_h);

	*out_plane_scale_w = plane_state->crtc_w * 1000 / plane_src_w;

	*out_plane_scale_h = plane_state->crtc_h * 1000 / plane_src_h;

	*out_plane_scale_w = plane_src_w ? plane_state->crtc_w * 1000 / plane_src_w : 0;

	*out_plane_scale_h = plane_src_h ? plane_state->crtc_h * 1000 / plane_src_h : 0;

}



/*

drivers/gpu/drm/amd/display/dc/core/dc.c

+1 −1
Original line number Diff line number Diff line
@@ -4510,7 +4510,7 @@ static bool commit_minimal_transition_based_on_current_context(struct dc *dc, 
	struct pipe_split_policy_backup policy;

	struct dc_state *intermediate_context;

	struct dc_state *old_current_state = dc->current_state;

	struct dc_surface_update srf_updates[MAX_SURFACE_NUM] = {0};

	struct dc_surface_update srf_updates[MAX_SURFACES] = {0};

	int surface_count;



	/*